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| author | Russell King <rmk+kernel@arm.linux.org.uk> | 2009-12-04 14:59:47 +0000 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2009-12-04 14:59:47 +0000 |
| commit | 5cb2faa6ede7ada9cb2bffc832c4ce60f53d6834 (patch) | |
| tree | 7b72b66081d042a41dc822575503133364857ce2 /arch/arm/mm/mmu.c | |
| parent | e0ee98513d1a2e24d2ddbdecf4216bcca29d1158 (diff) | |
| parent | 6060e8df517847bf445ebc61de7d4d9c7faae990 (diff) | |
Merge branch 'pending-misc' (early part) into devel
Diffstat (limited to 'arch/arm/mm/mmu.c')
| -rw-r--r-- | arch/arm/mm/mmu.c | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c index 02243eeccf50..2427cdcd9098 100644 --- a/arch/arm/mm/mmu.c +++ b/arch/arm/mm/mmu.c @@ -117,6 +117,13 @@ static void __init early_cachepolicy(char **p) } if (i == ARRAY_SIZE(cache_policies)) printk(KERN_ERR "ERROR: unknown or unsupported cache policy\n"); + /* + * This restriction is partly to do with the way we boot; it is + * unpredictable to have memory mapped using two different sets of + * memory attributes (shared, type, and cache attribs). We can not + * change these attributes once the initial assembly has setup the + * page tables. + */ if (cpu_architecture() >= CPU_ARCH_ARMv6) { printk(KERN_WARNING "Only cachepolicy=writeback supported on ARMv6 and later\n"); cachepolicy = CPOLICY_WRITEBACK; @@ -1029,7 +1036,7 @@ void __init paging_init(struct machine_desc *mdesc) */ zero_page = alloc_bootmem_low_pages(PAGE_SIZE); empty_zero_page = virt_to_page(zero_page); - flush_dcache_page(empty_zero_page); + __flush_dcache_page(NULL, empty_zero_page); } /* |