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| author | Jeff Garzik <jeff@garzik.org> | 2006-06-08 15:24:46 -0400 |
|---|---|---|
| committer | Jeff Garzik <jeff@garzik.org> | 2006-06-08 15:24:46 -0400 |
| commit | d15a88fc21ef225768ce31be16edfc9c6e2e02e3 (patch) | |
| tree | d4cb0a1bc97973bb947e2667ae56bc4bc2256e9d /arch/arm/mm/proc-xsc3.S | |
| parent | b53471711f21ba0e151075f0e1d6d531eb50f1b1 (diff) | |
| parent | 1def630a6a49dda5bc89dfbd86656293640456f0 (diff) | |
Merge branch 'master' into upstream
Diffstat (limited to 'arch/arm/mm/proc-xsc3.S')
| -rw-r--r-- | arch/arm/mm/proc-xsc3.S | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/mm/proc-xsc3.S b/arch/arm/mm/proc-xsc3.S index 80873b36c3f7..8d32e21fe151 100644 --- a/arch/arm/mm/proc-xsc3.S +++ b/arch/arm/mm/proc-xsc3.S @@ -427,12 +427,13 @@ __xsc3_setup: #endif mcr p15, 0, r0, c1, c0, 1 @ set auxiliary control reg mrc p15, 0, r0, c1, c0, 0 @ get control register - bic r0, r0, #0x0200 @ .... ..R. .... .... bic r0, r0, #0x0002 @ .... .... .... ..A. orr r0, r0, #0x0005 @ .... .... .... .C.M #if BTB_ENABLE + bic r0, r0, #0x0200 @ .... ..R. .... .... orr r0, r0, #0x3900 @ ..VI Z..S .... .... #else + bic r0, r0, #0x0a00 @ .... Z.R. .... .... orr r0, r0, #0x3100 @ ..VI ...S .... .... #endif #if L2_CACHE_ENABLE |