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authorRussell King (Oracle) <rmk+kernel@armlinux.org.uk>2026-08-05 17:08:50 +0100
committerRussell King <rmk+kernel@armlinux.org.uk>2026-08-30 15:05:54 +0100
commit1a89abc009cb5035d0cb4e5ba48d32b94f30e8e4 (patch)
tree1d443a8a35c356b42e9f3f035f908c36b682ef56 /arch/arm/mm
parent1039bffd6ae9c75b42b7d148d6c1106134107b66 (diff)
parentbb3b2cfeb206f5b10b859e134651b54120e3f530 (diff)
Merge branches 'fixes' and 'misc' into for-linus
Diffstat (limited to 'arch/arm/mm')
-rw-r--r--arch/arm/mm/proc-arm920.S2
-rw-r--r--arch/arm/mm/proc-arm922.S2
-rw-r--r--arch/arm/mm/proc-arm925.S2
-rw-r--r--arch/arm/mm/proc-arm926.S2
4 files changed, 0 insertions, 8 deletions
diff --git a/arch/arm/mm/proc-arm920.S b/arch/arm/mm/proc-arm920.S
index 4727f4b5b6e8..0326067c6c75 100644
--- a/arch/arm/mm/proc-arm920.S
+++ b/arch/arm/mm/proc-arm920.S
@@ -8,8 +8,6 @@
*
* These are the low level assembler for performing cache and TLB
* functions on the arm920.
- *
- * CONFIG_CPU_ARM920_CPU_IDLE -> nohlt
*/
#include <linux/linkage.h>
#include <linux/init.h>
diff --git a/arch/arm/mm/proc-arm922.S b/arch/arm/mm/proc-arm922.S
index 5a4a3f4f2683..3fe6fdf0d325 100644
--- a/arch/arm/mm/proc-arm922.S
+++ b/arch/arm/mm/proc-arm922.S
@@ -9,8 +9,6 @@
*
* These are the low level assembler for performing cache and TLB
* functions on the arm922.
- *
- * CONFIG_CPU_ARM922_CPU_IDLE -> nohlt
*/
#include <linux/linkage.h>
#include <linux/init.h>
diff --git a/arch/arm/mm/proc-arm925.S b/arch/arm/mm/proc-arm925.S
index 1c4830afe1d3..2d15467e4a08 100644
--- a/arch/arm/mm/proc-arm925.S
+++ b/arch/arm/mm/proc-arm925.S
@@ -15,8 +15,6 @@
* These are the low level assembler for performing cache and TLB
* functions on the arm925.
*
- * CONFIG_CPU_ARM925_CPU_IDLE -> nohlt
- *
* Some additional notes based on deciphering the TI TRM on OMAP-5910:
*
* NOTE1: The TI925T Configuration Register bit "D-cache clean and flush
diff --git a/arch/arm/mm/proc-arm926.S b/arch/arm/mm/proc-arm926.S
index a09cc3e02efd..d94aa8199452 100644
--- a/arch/arm/mm/proc-arm926.S
+++ b/arch/arm/mm/proc-arm926.S
@@ -8,8 +8,6 @@
*
* These are the low level assembler for performing cache and TLB
* functions on the arm926.
- *
- * CONFIG_CPU_ARM926_CPU_IDLE -> nohlt
*/
#include <linux/linkage.h>
#include <linux/init.h>