diff options
| author | Florinel Iordache <florinel.iordache@nxp.com> | 2018-11-05 17:02:19 +0200 |
|---|---|---|
| committer | Dong Aisheng <aisheng.dong@nxp.com> | 2019-11-25 16:10:48 +0800 |
| commit | 534cfce193bbaff52612007c9d1c387508a75496 (patch) | |
| tree | 3461fac771fa36fe9f1526ed3fb528ca1297f5f2 /arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts | |
| parent | 424023f637b9dcdf237d0d25cde03eb0786ac07d (diff) | |
arm64: dts: lx2160: PCS PHY definitions for 10GBase-KR and 40GBase-KR backplane modes
Signed-off-by: Florinel Iordache <florinel.iordache@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts index 7eb616938499..fed55d5c6c37 100644 --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts @@ -162,3 +162,43 @@ &usb1 { status = "okay"; }; + +&pcs_mdio1 { + pcs_phy1: ethernet-phy@0 { + compatible = "ethernet-phy-ieee802.3-c45"; + backplane-mode = "40gbase-kr"; + reg = <0x0>; + fsl,lane-handle = <&serdes1>; + fsl,lane-reg = <0xF00 0xE00 0xD00 0xC00>; /* lanes H, G, F, E */ + }; +}; + +&pcs_mdio2 { + pcs_phy2: ethernet-phy@0 { + compatible = "ethernet-phy-ieee802.3-c45"; + backplane-mode = "40gbase-kr"; + reg = <0x0>; + fsl,lane-handle = <&serdes1>; + fsl,lane-reg = <0xB00 0xA00 0x900 0x800>; /* lanes D, C, B, A */ + }; +}; + +&pcs_mdio3 { + pcs_phy3: ethernet-phy@0 { + compatible = "ethernet-phy-ieee802.3-c45"; + backplane-mode = "10gbase-kr"; + reg = <0x0>; + fsl,lane-handle = <&serdes1>; + fsl,lane-reg = <0xF00 0x100>; /* lane H */ + }; +}; + +&pcs_mdio4 { + pcs_phy4: ethernet-phy@0 { + compatible = "ethernet-phy-ieee802.3-c45"; + backplane-mode = "10gbase-kr"; + reg = <0x0>; + fsl,lane-handle = <&serdes1>; + fsl,lane-reg = <0xE00 0x100>; /* lane G */ + }; +}; |