diff options
author | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2021-05-04 14:54:19 +0200 |
---|---|---|
committer | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2021-05-05 23:03:56 +0200 |
commit | a08f3c7add53eaaa4ab453ac3f06c24ec8927579 (patch) | |
tree | d0d794479622b8054d0ae746a5dff0524cfe472c /arch/arm64/boot/dts/freescale/imx8mp.dtsi | |
parent | 82e97870feb6303ecc71371abc76a606e724b065 (diff) | |
parent | 28910e01c43d9735f06fddbeaa42df3e112d1b3e (diff) |
Merge commit '28910e01c43d9735f06fddbeaa42df3e112d1b3e' into toradex_5.4-2.3.x-imx
This basically contains NXP BSP Patch L5.4.70_2.3.2 plus kernel.org
v5.4.115 from https://github.com/Freescale/linux-fslc/tree/5.4-2.3.x-imx.
Related-to: ELB-3958
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8mp.dtsi')
-rw-r--r-- | arch/arm64/boot/dts/freescale/imx8mp.dtsi | 39 |
1 files changed, 30 insertions, 9 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index 3a16d9d80a56..62ac5c025a5f 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: (GPL-2.0+ OR MIT) /* - * Copyright 2019 NXP + * Copyright 2019-2021 NXP */ #include <dt-bindings/clock/imx8mp-clock.h> @@ -206,6 +206,12 @@ no-map; reg = <0 0x92400000 0 0x2000000>; }; + + /* used only by tuning tool, can be removed for normal case */ + isp0_reserved: isp0@94400000 { + no-map; + reg = <0 0x94400000 0 0x10000000>; + }; }; osc_32k: clock-osc-32k { @@ -1810,13 +1816,17 @@ compatible = "fsl,imx8mp-isp"; reg = <0x32e10000 0x10000>; interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clk IMX8MP_CLK_MEDIA_ISP_SRC>; - clock-names = "isp_root"; + clocks = <&clk IMX8MP_CLK_MEDIA_ISP_SRC>, + <&clk IMX8MP_CLK_MEDIA_AXI>, + <&clk IMX8MP_CLK_MEDIA_APB>; + clock-names = "core", "axi", "ahb"; assigned-clocks = <&clk IMX8MP_CLK_MEDIA_ISP_SRC>; assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_500M>; assigned-clock-rates = <500000000>; power-domains = <&ispdwp_pd>; id = <0>; + gpr = <&mediamix_blk_ctl>; + memory-region = <&isp0_reserved>; status = "disabled"; }; @@ -1824,13 +1834,16 @@ compatible = "fsl,imx8mp-isp"; reg = <0x32e20000 0x10000>; interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clk IMX8MP_CLK_MEDIA_ISP_SRC>; - clock-names = "isp_root"; + clocks = <&clk IMX8MP_CLK_MEDIA_ISP_SRC>, + <&clk IMX8MP_CLK_MEDIA_AXI>, + <&clk IMX8MP_CLK_MEDIA_APB>; + clock-names = "core", "axi", "ahb"; assigned-clocks = <&clk IMX8MP_CLK_MEDIA_ISP_SRC>; assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_500M>; assigned-clock-rates = <500000000>; power-domains = <&ispdwp_pd>; id = <1>; + gpr = <&mediamix_blk_ctl>; status = "disabled"; }; @@ -1838,6 +1851,15 @@ compatible = "fsl,imx8mp-dwe"; reg = <0x32e30000 0x10000>; interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk IMX8MP_CLK_MEDIA_AXI>, + <&clk IMX8MP_CLK_MEDIA_AXI>, + <&clk IMX8MP_CLK_MEDIA_APB>; + clock-names = "core", "axi", "ahb"; + assigned-clocks = <&clk IMX8MP_CLK_MEDIA_AXI_ROOT>, + <&clk IMX8MP_CLK_MEDIA_APB_ROOT>; + assigned-clock-rates = <500000000>, <200000000>; + power-domains = <&ispdwp_pd>; + id = <0>; status = "disabled"; }; @@ -1871,7 +1893,7 @@ <&clk IMX8MP_CLK_MEDIA_APB>; clock-names = "mipi_clk", "disp_axi", "disp_apb"; assigned-clocks = <&clk IMX8MP_CLK_MEDIA_CAM2_PIX>; - assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_1000M>; + assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_266M>; assigned-clock-rates = <266000000>; bus-width = <4>; csi-gpr = <&mediamix_gasket1>; @@ -1887,10 +1909,8 @@ pcie_phy: pcie-phy@32f00000 { compatible = "fsl,imx8mp-pcie-phy"; reg = <0x0 0x32f00000 0x0 0x10000>; - clocks = <&clk IMX8MP_CLK_PCIE_PHY>; + clocks = <&clk IMX8MP_CLK_DUMMY>; clock-names = "phy"; - assigned-clocks = <&clk IMX8MP_CLK_PCIE_PHY>; - assigned-clock-parents = <&clk IMX8MP_CLK_24M>; #phy-cells = <0>; status = "disabled"; }; @@ -1940,6 +1960,7 @@ ranges = <0x81000000 0 0x00000000 0x0 0x1ff80000 0 0x00010000 /* downstream I/O 64KB */ 0x82000000 0 0x18000000 0x0 0x18000000 0 0x07f00000>; /* non-prefetchable memory */ num-lanes = <1>; + num-viewport = <4>; interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; /* eDMA */ interrupt-names = "msi", "dma"; |