diff options
| author | Anson Huang <Anson.Huang@nxp.com> | 2019-11-06 10:33:51 +0800 |
|---|---|---|
| committer | Dong Aisheng <aisheng.dong@nxp.com> | 2019-11-25 16:09:11 +0800 |
| commit | 7a34d0e8b2f6a6dcf6c8461d06604058594f2a47 (patch) | |
| tree | c75a2973235a5caffca1bfda536e77a69ea2aa0c /arch/arm64/boot/dts/freescale/imx8qm-lpddr4-val-ca53.dts | |
| parent | 414eb312b28c62be0bf7e69b55bf17f774763761 (diff) | |
arm64: dts: imx8qm: Add LPDDR4 validation board single cluster support
Add *-ca53.dtb and *-ca72.dtb to support booting up single
cluster on LPDDR4 validation board, to boot up single A72 cluster,
dedicated flash.bin needs to be used.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8qm-lpddr4-val-ca53.dts')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8qm-lpddr4-val-ca53.dts | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8qm-lpddr4-val-ca53.dts b/arch/arm64/boot/dts/freescale/imx8qm-lpddr4-val-ca53.dts new file mode 100644 index 000000000000..53f8bad38368 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8qm-lpddr4-val-ca53.dts @@ -0,0 +1,30 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2019 NXP + */ + +/dts-v1/; + +#include "imx8qm-lpddr4-val.dts" + +&thermal_zones { + /delete-node/ cpu-thermal1; + + pmic-thermal0 { + cooling-maps { + map0 { + cooling-device = + <&A53_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&A53_1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&A53_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&A53_3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; +}; + +&cpus { + /delete-node/ cpu-map; + /delete-node/ cpu@100; + /delete-node/ cpu@101; +}; |