Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cooloney/blackfin-2.6

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cooloney/blackfin-2.6:
  Blackfin arch: Fix PM building on BF52x: No ROTWE on BF52x, add USBWE
  Blackfin arch: sram: use 'unsigned long' for irqflags
  Blackfin arch: let PCI depend on BROKEN
  Blackfin arch: move include/asm-blackfin header files to arch/blackfin
  Blackfin arch: fix bug - MPU crashes under stress
  Blackfin arch: Fix bug - when to rmmod the L1_module, it stucks and then reboot the board.
  Blackfin arch: dont actually need to muck with EMAC_SYSTAT for BF52x for demuxing
  Blackfin arch: Add MTD Partitions for MTD_DATAFLASH, increase max SPI SCLK

1 files changed, 45 insertions, 0 deletions

diff --git a/arch/blackfin/include/asm/hardirq.h b/arch/blackfin/include/asm/hardirq.h
new file mode 100644
index 000000000000..b6b19f1b9dab
--- /dev/null
+++ b/arch/blackfin/include/asm/hardirq.h
@@ -0,0 +1,45 @@
+#ifndef __BFIN_HARDIRQ_H
+#define __BFIN_HARDIRQ_H
+
+#include <linux/cache.h>
+#include <linux/threads.h>
+#include <asm/irq.h>
+
+typedef struct {
+	unsigned int __softirq_pending;
+	unsigned int __syscall_count;
+	struct task_struct *__ksoftirqd_task;
+} ____cacheline_aligned irq_cpustat_t;
+
+#include <linux/irq_cpustat.h>	/* Standard mappings for irq_cpustat_t above */
+
+/*
+ * We put the hardirq and softirq counter into the preemption
+ * counter. The bitmask has the following meaning:
+ *
+ * - bits 0-7 are the preemption count (max preemption depth: 256)
+ * - bits 8-15 are the softirq count (max # of softirqs: 256)
+ * - bits 16-23 are the hardirq count (max # of hardirqs: 256)
+ *
+ * - ( bit 26 is the PREEMPT_ACTIVE flag. )
+ *
+ * PREEMPT_MASK: 0x000000ff
+ * HARDIRQ_MASK: 0x0000ff00
+ * SOFTIRQ_MASK: 0x00ff0000
+ */
+
+#if NR_IRQS > 256
+#define HARDIRQ_BITS	9
+#else
+#define HARDIRQ_BITS	8
+#endif
+
+#ifdef NR_IRQS
+# if (1 << HARDIRQ_BITS) < NR_IRQS
+# error HARDIRQ_BITS is too low!
+# endif
+#endif
+
+#define __ARCH_IRQ_EXIT_IRQS_DISABLED	1
+
+#endif