diff options
| author | Linus Torvalds <torvalds@g5.osdl.org> | 2006-04-18 19:49:42 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-04-18 19:49:42 -0700 |
| commit | 038e5e2bf2819058fb1b4b52b583bef9ad063356 (patch) | |
| tree | 3a152b455f845a25d0958af5b461b034c2d565fa /arch/mips/dec/int-handler.S | |
| parent | 5c723d26fa223bdb17b9230c77e4e1156884475a (diff) | |
| parent | d34cb28a3718a7055ed14e2ec058fe3e4574af63 (diff) | |
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (47 commits)
[MAINTAINERS] The ham radio code now has website at http://www.linux-ax25.org.
[MIPS] Use __ffs() instead of ffs() for waybit calculation.
[MIPS] Fix Makefile bugs for MIPS32/MIPS64 R1 and R2.
[MIPS] Handle IDE PIO cache aliases on SMP.
[MIPS] Make mips_srs_init static.
[MIPS] MIPS boards: Set HZ to 100.
[MIPS] kgdb: Let gcc compute the array size itself.
[MIPS] FPU affinity for MT ASE.
[MIPS] MT: Improved multithreading support.
[MIPS] kpsd and other AP/SP improvements.
[MIPS] R2: Instruction hazard barrier.
[MIPS] Fix genrtc compilation.
[MIPS] R2: Implement shadow register allocation without spinlock.
[MIPS] Fix VR41xx build errors.
[MIPS] Fix tx49_blast_icache32_page_indexed.
[MIPS] Enable SCHED_NO_NO_OMIT_FRAME_POINTER for MIPS.
[MIPS] Use "R" constraint for cache_op.
[MIPS] Rewrite all the assembler interrupt handlers to C.
[MIPS] Fix the crime against humanity that mipsIRQ.S is.
[MIPS] Fixup damage done by 22a9835c350782a5c3257343713932af3ac92ee0.
...
Diffstat (limited to 'arch/mips/dec/int-handler.S')
| -rw-r--r-- | arch/mips/dec/int-handler.S | 14 |
1 files changed, 6 insertions, 8 deletions
diff --git a/arch/mips/dec/int-handler.S b/arch/mips/dec/int-handler.S index 41fa372007bf..e8ec93e33fe6 100644 --- a/arch/mips/dec/int-handler.S +++ b/arch/mips/dec/int-handler.S @@ -36,7 +36,7 @@ .text .set noreorder /* - * decstation_handle_int: Interrupt handler for DECstations + * plat_irq_dispatch: Interrupt handler for DECstations * * We follow the model in the Indy interrupt code by David Miller, where he * says: a lot of complication here is taken away because: @@ -125,11 +125,7 @@ * just take another exception, big deal. */ .align 5 - NESTED(decstation_handle_int, PT_SIZE, ra) - .set noat - SAVE_ALL - CLI # TEST: interrupts should be off - .set at + NESTED(plat_irq_dispatch, PT_SIZE, ra) .set noreorder /* @@ -282,9 +278,11 @@ fpu: #endif spurious: - j spurious_interrupt + jal spurious_interrupt nop - END(decstation_handle_int) + j ret_from_irq + nop + END(plat_irq_dispatch) /* * Generic unimplemented interrupt routines -- cpu_mask_nr_tbl |