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authorLinus Torvalds <torvalds@linux-foundation.org>2022-08-06 16:47:19 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2022-08-06 16:47:19 -0700
commitd77771c926671e0362af3fe792391be66072b242 (patch)
tree14638c3e89193ec1a610896fe02516dd3213f1b3 /arch/mips/include/asm/octeon/cvmx-helper-board.h
parentcae4199f9319f42534ee2e2e4aadf183b9bb7f73 (diff)
parent74de14fe05dd6b151d73cb0c73c8ec874cbdcde6 (diff)
Merge tag 'mips_6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux
Pull MIPS updates from Thomas Bogendoerfer: - added support for Netgear WNR3500L v2 - removed support for VR41xx SoC and platforms based on it - cleanups and fixes * tag 'mips_6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (25 commits) MIPS: tlbex: Explicitly compare _PAGE_NO_EXEC against 0 Revert "MIPS: octeon: Remove vestiges of CONFIG_CAVIUM_RESERVE32" MIPS: Introduce CAVIUM_RESERVE32 Kconfig option MIPS: msi-octeon: eliminate kernel-doc warnings MIPS: Fix comment typo MIPS: BMIPS: Utilize cfe_die() for invalid DTB MIPS: CFE: Add cfe_die() MIPS: Fixed __debug_virt_addr_valid() MIPS: BCM47XX: Add support for Netgear WNR3500L v2 MIPS: Remove VR41xx support MIPS: dts: align gpio-key node names with dtschema MIPS: dts: correct gpio-keys names and properties MIPS: cpuinfo: Fix a warning for CONFIG_CPUMASK_OFFSTACK MIPS: Make phys_to_virt utilize __va() MIPS: vdso: Utilize __pa() for gic_pfn MIPS: mm: Use the bitmap API to allocate bitmaps MIPS: math-emu: Use the bitmap API to allocate bitmaps MIPS: Loongson64: Fix section mismatch warning mips: cavium-octeon: Fix missing of_node_put() in octeon2_usb_clocks_start MIPS: mscc: ocelot: enable FDMA usage ...
Diffstat (limited to 'arch/mips/include/asm/octeon/cvmx-helper-board.h')
-rw-r--r--arch/mips/include/asm/octeon/cvmx-helper-board.h12
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/mips/include/asm/octeon/cvmx-helper-board.h b/arch/mips/include/asm/octeon/cvmx-helper-board.h
index ce52aafe7a8d..cfe9c256a918 100644
--- a/arch/mips/include/asm/octeon/cvmx-helper-board.h
+++ b/arch/mips/include/asm/octeon/cvmx-helper-board.h
@@ -63,9 +63,9 @@ typedef enum {
* connected to this port. On chips supporting multiple MII
* busses the bus number is encoded in bits <15:8>.
*
- * This function must be modifed for every new Octeon board.
+ * This function must be modified for every new Octeon board.
* Internally it uses switch statements based on the cvmx_sysinfo
- * data to determine board types and revisions. It relys on the
+ * data to determine board types and revisions. It relies on the
* fact that every Octeon board receives a unique board type
* enumeration from the bootloader.
*
@@ -81,9 +81,9 @@ extern int cvmx_helper_board_get_mii_address(int ipd_port);
* and are handled by the fall through case. This function must be
* updated for boards that don't have the normal Marvell PHYs.
*
- * This function must be modifed for every new Octeon board.
+ * This function must be modified for every new Octeon board.
* Internally it uses switch statements based on the cvmx_sysinfo
- * data to determine board types and revisions. It relys on the
+ * data to determine board types and revisions. It relies on the
* fact that every Octeon board receives a unique board type
* enumeration from the bootloader.
*
@@ -103,9 +103,9 @@ extern union cvmx_helper_link_info __cvmx_helper_board_link_get(int ipd_port);
* support and should return the number of actual ports on the
* board.
*
- * This function must be modifed for every new Octeon board.
+ * This function must be modified for every new Octeon board.
* Internally it uses switch statements based on the cvmx_sysinfo
- * data to determine board types and revisions. It relys on the
+ * data to determine board types and revisions. It relies on the
* fact that every Octeon board receives a unique board type
* enumeration from the bootloader.
*