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authorNathan Chancellor <nathan@kernel.org>2023-01-11 20:04:59 -0700
committerMasahiro Yamada <masahiroy@kernel.org>2023-01-26 12:41:16 +0900
commit80a20d2f8288afcd6036bbab8717061806ace4f2 (patch)
treeaefc3c3455c3190439ada309904d3138d4530127 /arch/mips/kernel
parent994f5f7816ff963f49269cfc97f63cb2e4edb84f (diff)
MIPS: Always use -Wa,-msoft-float and eliminate GAS_HAS_SET_HARDFLOAT
-Wa,-msoft-float is tested with as-option, which will be a problem for clang with an upcoming change to move as-option to use KBUILD_AFLAGS instead of KBUILD_CFLAGS due to a lack of '-mno-abicalls' in KBUILD_AFLAGS at the point that this check occurs; $(cflags-y) is added to KBUILD_AFLAGS towards the end of this file. clang: error: ignoring '-fno-PIE' option as it cannot be used with implicit usage of -mabicalls and the N64 ABI [-Werror,-Woption-ignored] This could be resolved by switching to a cc-option check but '$(cflags-y)' would need to be added so that '-mno-abicalls' is present for the test. However, this check is no longer necessary, as -msoft-float is supported by all supported assembler versions (GNU as 2.25+ and LLVM 11+). Eliminate GAS_HAS_SET_HARDFLOAT and all of its uses, inlining SET_HARDFLOAT where necessary. Link: https://lore.kernel.org/202209101939.bvk64Fok-lkp@intel.com/ Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Nathan Chancellor <nathan@kernel.org> Acked-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Reviewed-by: Nick Desaulniers <ndesaulniers@google.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Linux Kernel Functional Testing <lkft@linaro.org> Tested-by: Anders Roxell <anders.roxell@linaro.org> Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
Diffstat (limited to 'arch/mips/kernel')
-rw-r--r--arch/mips/kernel/genex.S2
-rw-r--r--arch/mips/kernel/r2300_fpu.S4
-rw-r--r--arch/mips/kernel/r4k_fpu.S12
3 files changed, 9 insertions, 9 deletions
diff --git a/arch/mips/kernel/genex.S b/arch/mips/kernel/genex.S
index 3425df6019c0..b6de8e88c1bd 100644
--- a/arch/mips/kernel/genex.S
+++ b/arch/mips/kernel/genex.S
@@ -480,7 +480,7 @@ NESTED(nmi_handler, PT_SIZE, sp)
.set push
/* gas fails to assemble cfc1 for some archs (octeon).*/ \
.set mips1
- SET_HARDFLOAT
+ .set hardfloat
cfc1 a1, fcr31
.set pop
.endm
diff --git a/arch/mips/kernel/r2300_fpu.S b/arch/mips/kernel/r2300_fpu.S
index 2748c55820c2..6c745aa9e825 100644
--- a/arch/mips/kernel/r2300_fpu.S
+++ b/arch/mips/kernel/r2300_fpu.S
@@ -64,7 +64,7 @@ LEAF(_restore_fp)
*/
LEAF(_save_fp_context)
.set push
- SET_HARDFLOAT
+ .set hardfloat
li v0, 0 # assume success
cfc1 t1, fcr31
EX2(s.d $f0, 0(a0))
@@ -98,7 +98,7 @@ LEAF(_save_fp_context)
*/
LEAF(_restore_fp_context)
.set push
- SET_HARDFLOAT
+ .set hardfloat
li v0, 0 # assume success
EX(lw t0, (a1))
EX2(l.d $f0, 0(a0))
diff --git a/arch/mips/kernel/r4k_fpu.S b/arch/mips/kernel/r4k_fpu.S
index 2e687c60bc4f..4e8c98517d9d 100644
--- a/arch/mips/kernel/r4k_fpu.S
+++ b/arch/mips/kernel/r4k_fpu.S
@@ -26,7 +26,7 @@
.macro EX insn, reg, src
.set push
- SET_HARDFLOAT
+ .set hardfloat
.set nomacro
.ex\@: \insn \reg, \src
.set pop
@@ -98,14 +98,14 @@ LEAF(_init_msa_upper)
*/
LEAF(_save_fp_context)
.set push
- SET_HARDFLOAT
+ .set hardfloat
cfc1 t1, fcr31
.set pop
#if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPSR2) || \
defined(CONFIG_CPU_MIPSR5) || defined(CONFIG_CPU_MIPSR6)
.set push
- SET_HARDFLOAT
+ .set hardfloat
#if defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_CPU_MIPSR5)
.set mips32r2
.set fp=64
@@ -135,7 +135,7 @@ LEAF(_save_fp_context)
#endif
.set push
- SET_HARDFLOAT
+ .set hardfloat
/* Store the 16 even double precision registers */
EX sdc1 $f0, 0(a0)
EX sdc1 $f2, 16(a0)
@@ -173,7 +173,7 @@ LEAF(_restore_fp_context)
#if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPSR2) || \
defined(CONFIG_CPU_MIPSR5) || defined(CONFIG_CPU_MIPSR6)
.set push
- SET_HARDFLOAT
+ .set hardfloat
#if defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_CPU_MIPSR5)
.set mips32r2
.set fp=64
@@ -201,7 +201,7 @@ LEAF(_restore_fp_context)
1: .set pop
#endif
.set push
- SET_HARDFLOAT
+ .set hardfloat
EX ldc1 $f0, 0(a0)
EX ldc1 $f2, 16(a0)
EX ldc1 $f4, 32(a0)