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| author | Thomas Hellström <thomas.hellstrom@linux.intel.com> | 2025-12-04 22:54:56 +0100 |
|---|---|---|
| committer | Thomas Hellström <thomas.hellstrom@linux.intel.com> | 2025-12-04 22:54:56 +0100 |
| commit | 3f1c07fc21c68bd3bd2df9d2c9441f6485e934d9 (patch) | |
| tree | 2bbe746323ca53170b1c6f18f67178021d5854f5 /arch/riscv/include/asm/vendor_extensions/mips.h | |
| parent | d72312d730450aab225a80bc84436757b85b08b5 (diff) | |
| parent | 0692602defb0c273f80dec9c564ca50726404aca (diff) | |
Merge drm/drm-next into drm-xe-next-fixes
Backmerging to be able do to a clean PR.
Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Diffstat (limited to 'arch/riscv/include/asm/vendor_extensions/mips.h')
| -rw-r--r-- | arch/riscv/include/asm/vendor_extensions/mips.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/riscv/include/asm/vendor_extensions/mips.h b/arch/riscv/include/asm/vendor_extensions/mips.h index ea8ca747d691..ffeb12dc17a3 100644 --- a/arch/riscv/include/asm/vendor_extensions/mips.h +++ b/arch/riscv/include/asm/vendor_extensions/mips.h @@ -30,8 +30,8 @@ extern struct riscv_isa_vendor_ext_data_list riscv_isa_vendor_ext_list_mips; * allowing any subsequent instructions to fetch. */ -#define MIPS_PAUSE ".4byte 0x00501013\n\t" -#define MIPS_EHB ".4byte 0x00301013\n\t" -#define MIPS_IHB ".4byte 0x00101013\n\t" +#define MIPS_PAUSE ASM_INSN_I("0x00501013\n\t") +#define MIPS_EHB ASM_INSN_I("0x00301013\n\t") +#define MIPS_IHB ASM_INSN_I("0x00101013\n\t") #endif // _ASM_RISCV_VENDOR_EXTENSIONS_MIPS_H |