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| author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2008-08-07 09:55:03 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2008-08-07 09:55:03 +0100 |
| commit | 4fb8af10d0fd09372d52966b76922b9e82bbc950 (patch) | |
| tree | d240e4d40357583e3f3eb228dccf20122a5b31ed /arch/sh/include/cpu-sh3/cpu/mmu_context.h | |
| parent | f44f82e8a20b98558486eb14497b2f71c78fa325 (diff) | |
| parent | 64a99d2a8c3ed5c4e39f3ae1cc682aa8fd3977fc (diff) | |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/sam/kbuild-fixes
Diffstat (limited to 'arch/sh/include/cpu-sh3/cpu/mmu_context.h')
| -rw-r--r-- | arch/sh/include/cpu-sh3/cpu/mmu_context.h | 44 |
1 files changed, 44 insertions, 0 deletions
diff --git a/arch/sh/include/cpu-sh3/cpu/mmu_context.h b/arch/sh/include/cpu-sh3/cpu/mmu_context.h new file mode 100644 index 000000000000..ab09da73ce77 --- /dev/null +++ b/arch/sh/include/cpu-sh3/cpu/mmu_context.h @@ -0,0 +1,44 @@ +/* + * include/asm-sh/cpu-sh3/mmu_context.h + * + * Copyright (C) 1999 Niibe Yutaka + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#ifndef __ASM_CPU_SH3_MMU_CONTEXT_H +#define __ASM_CPU_SH3_MMU_CONTEXT_H + +#define MMU_PTEH 0xFFFFFFF0 /* Page table entry register HIGH */ +#define MMU_PTEL 0xFFFFFFF4 /* Page table entry register LOW */ +#define MMU_TTB 0xFFFFFFF8 /* Translation table base register */ +#define MMU_TEA 0xFFFFFFFC /* TLB Exception Address */ + +#define MMUCR 0xFFFFFFE0 /* MMU Control Register */ + +#define MMU_TLB_ADDRESS_ARRAY 0xF2000000 +#define MMU_PAGE_ASSOC_BIT 0x80 + +#define MMU_NTLB_ENTRIES 128 /* for 7708 */ +#define MMU_NTLB_WAYS 4 +#define MMU_CONTROL_INIT 0x007 /* SV=0, TF=1, IX=1, AT=1 */ + +#define TRA 0xffffffd0 +#define EXPEVT 0xffffffd4 + +#if defined(CONFIG_CPU_SUBTYPE_SH7705) || \ + defined(CONFIG_CPU_SUBTYPE_SH7706) || \ + defined(CONFIG_CPU_SUBTYPE_SH7707) || \ + defined(CONFIG_CPU_SUBTYPE_SH7709) || \ + defined(CONFIG_CPU_SUBTYPE_SH7710) || \ + defined(CONFIG_CPU_SUBTYPE_SH7712) || \ + defined(CONFIG_CPU_SUBTYPE_SH7720) || \ + defined(CONFIG_CPU_SUBTYPE_SH7721) +#define INTEVT 0xa4000000 /* INTEVTE2(0xa4000000) */ +#else +#define INTEVT 0xffffffd8 +#endif + +#endif /* __ASM_CPU_SH3_MMU_CONTEXT_H */ + |