summaryrefslogtreecommitdiff
path: root/arch/x86/kernel/acpi/apei.c
diff options
context:
space:
mode:
authorYazen Ghannam <yazen.ghannam@amd.com>2025-11-04 14:55:45 +0000
committerBorislav Petkov (AMD) <bp@alien8.de>2025-11-21 10:32:28 +0100
commiteeb3f76d73baed4c8ecc883e1eaafba3cb8aae1d (patch)
tree4db68a23532ca422dc5e0d10390fa137d6c1547c /arch/x86/kernel/acpi/apei.c
parent56f17be67a332d146821d1a812ab16388d07ace7 (diff)
x86/mce: Save and use APEI corrected threshold limit
The MCA threshold limit generally is not something that needs to change during runtime. It is common for a system administrator to decide on a policy for their managed systems. If MCA thresholding is OS-managed, then the threshold limit must be set at every boot. However, many systems allow the user to set a value in their BIOS. And this is reported through an APEI HEST entry even if thresholding is not in FW-First mode. Use this value, if available, to set the OS-managed threshold limit. Users can still override it through sysfs if desired for testing or debug. APEI is parsed after MCE is initialized. So reset the thresholding blocks later to pick up the threshold limit. Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Link: https://lore.kernel.org/20251104-wip-mca-updates-v8-0-66c8eacf67b9@amd.com
Diffstat (limited to 'arch/x86/kernel/acpi/apei.c')
-rw-r--r--arch/x86/kernel/acpi/apei.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/x86/kernel/acpi/apei.c b/arch/x86/kernel/acpi/apei.c
index 0916f00a992e..e21419e686eb 100644
--- a/arch/x86/kernel/acpi/apei.c
+++ b/arch/x86/kernel/acpi/apei.c
@@ -19,6 +19,8 @@ int arch_apei_enable_cmcff(struct acpi_hest_header *hest_hdr, void *data)
if (!cmc->enabled)
return 0;
+ mce_save_apei_thr_limit(cmc->notify.error_threshold_value);
+
/*
* We expect HEST to provide a list of MC banks that report errors
* in firmware first mode. Otherwise, return non-zero value to