diff options
| author | Tim Harvey <tharvey@gateworks.com> | 2025-09-18 08:44:47 -0700 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2025-10-21 16:29:40 +0800 |
| commit | 0a138a2cfd4e4210da1fe0795f4bf8e9cb5e341c (patch) | |
| tree | 901c4f6454c3cd0124eea72d4cee8286d96cb2e0 /arch | |
| parent | 69bb376d5e7291f8ad8738f41735dce1ac820f19 (diff) | |
arm64: dts: imx8mp-venice-gw702x: reduce RGMII CLK drive strength
The i.MX8M Plus EQOS RGMII tracelength is less than 1in and does not
require a x6 drive strength. Reduce the CLK drive strength to x1 for
lower emissions. Additionally since TXC is not a high frequency clock,
use slow slew rate (FSEL=0) for lower emmissions and improved signal
quality.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8mp-venice-gw702x.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw702x.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw702x.dtsi index a1232a4f8485..dd9eeb3479fd 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw702x.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw702x.dtsi @@ -462,7 +462,7 @@ MX8MP_IOMUXC_ENET_TD2__ENET_QOS_RGMII_TD2 0x16 MX8MP_IOMUXC_ENET_TD3__ENET_QOS_RGMII_TD3 0x16 MX8MP_IOMUXC_ENET_TX_CTL__ENET_QOS_RGMII_TX_CTL 0x16 - MX8MP_IOMUXC_ENET_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK 0x16 + MX8MP_IOMUXC_ENET_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK 0x0 >; }; |