diff options
| author | Arnd Bergmann <arnd@arndb.de> | 2026-01-29 09:09:26 +0100 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2026-01-29 09:09:27 +0100 |
| commit | 3b03f89dd297a518e64cbbf0b670bf8e05c700e5 (patch) | |
| tree | b2eeebfe6222d4eb806bd89e9c0fc158e8133adc /arch | |
| parent | ca36ef1bb44da7043a5cc52bb1cefeb968b91ba1 (diff) | |
| parent | 43cb48478719707b3ab115112b9e0168292c8270 (diff) | |
Merge tag 'xilinx-defconfig-for-6.20' of https://github.com/Xilinx/linux-xlnx into soc/defconfig
arm64: Xilinx defconfig changes for 6.20
- Enable missing drivers by default
* tag 'xilinx-defconfig-for-6.20' of https://github.com/Xilinx/linux-xlnx:
arm64: defconfig: Drop duplicate CONFIG_OMAP_USB2 entry
arm64: defconfig: Enable missing AMD/Xilinx drivers
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm64/configs/defconfig | 42 |
1 files changed, 42 insertions, 0 deletions
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 9e83893a2d1e..5112fc9f8fc6 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -236,6 +236,10 @@ CONFIG_PCIE_RCAR_EP=y CONFIG_PCIE_RENESAS_RZG3S_HOST=y CONFIG_PCIE_ROCKCHIP_HOST=m CONFIG_PCI_XGENE=y +CONFIG_PCIE_XILINX=y +CONFIG_PCIE_XILINX_DMA_PL=y +CONFIG_PCIE_XILINX_NWL=y +CONFIG_PCIE_XILINX_CPM=y CONFIG_PCI_IMX6_HOST=y CONFIG_PCI_LAYERSCAPE=y CONFIG_PCI_HISI=y @@ -276,6 +280,7 @@ CONFIG_QCOM_QSEECOM=y CONFIG_QCOM_QSEECOM_UEFISECAPP=y CONFIG_EXYNOS_ACPM_PROTOCOL=m CONFIG_TEGRA_BPMP=y +CONFIG_ZYNQMP_FIRMWARE_DEBUG=y CONFIG_GNSS=m CONFIG_GNSS_MTK_SERIAL=m CONFIG_MTD=y @@ -309,6 +314,7 @@ CONFIG_QCOM_COINCELL=m CONFIG_QCOM_FASTRPC=m CONFIG_SRAM=y CONFIG_PCI_ENDPOINT_TEST=m +CONFIG_XILINX_SDFEC=m CONFIG_EEPROM_AT24=m CONFIG_EEPROM_AT25=m CONFIG_UACCE=m @@ -398,6 +404,7 @@ CONFIG_DWMAC_MEDIATEK=m CONFIG_DWMAC_TEGRA=m CONFIG_TI_K3_AM65_CPSW_NUSS=y CONFIG_TI_ICSSG_PRUETH=m +CONFIG_XILINX_AXI_EMAC=m CONFIG_QCOM_IPA=m CONFIG_MESON_GXL_PHY=m CONFIG_AQUANTIA_PHY=y @@ -414,7 +421,9 @@ CONFIG_DP83867_PHY=y CONFIG_DP83869_PHY=m CONFIG_DP83TD510_PHY=y CONFIG_VITESSE_PHY=y +CONFIG_XILINX_GMII2RGMII=m CONFIG_CAN_FLEXCAN=m +CONFIG_CAN_XILINXCAN=m CONFIG_CAN_M_CAN=m CONFIG_CAN_M_CAN_PLATFORM=m CONFIG_CAN_RCAR=m @@ -568,6 +577,7 @@ CONFIG_I2C_S3C2410=y CONFIG_I2C_SH_MOBILE=y CONFIG_I2C_TEGRA=y CONFIG_I2C_UNIPHIER_F=y +CONFIG_I2C_XILINX=m CONFIG_I2C_RCAR=y CONFIG_I2C_CROS_EC_TUNNEL=y CONFIG_SPI=y @@ -606,6 +616,8 @@ CONFIG_SPI_STM32_OSPI=m CONFIG_SPI_SUN6I=y CONFIG_SPI_TEGRA210_QUAD=m CONFIG_SPI_TEGRA114=m +CONFIG_SPI_XILINX=m +CONFIG_SPI_ZYNQMP_GQSPI=m CONFIG_SPI_SPIDEV=m CONFIG_SPMI=y CONFIG_SPMI_APPLE=m @@ -700,6 +712,8 @@ CONFIG_GPIO_WCD934X=m CONFIG_GPIO_VF610=y CONFIG_GPIO_XGENE=y CONFIG_GPIO_XGENE_SB=y +CONFIG_GPIO_XILINX=m +CONFIG_GPIO_ZYNQ=m CONFIG_GPIO_MAX732X=y CONFIG_GPIO_PCA953X=y CONFIG_GPIO_PCA953X_IRQ=y @@ -774,6 +788,8 @@ CONFIG_QCOM_LMH=m CONFIG_UNIPHIER_THERMAL=y CONFIG_KHADAS_MCU_FAN_THERMAL=m CONFIG_WATCHDOG=y +CONFIG_XILINX_WATCHDOG=m +CONFIG_XILINX_WINDOW_WATCHDOG=m CONFIG_SL28CPLD_WATCHDOG=m CONFIG_ARM_SP805_WATCHDOG=y CONFIG_ARM_SBSA_WATCHDOG=y @@ -1022,6 +1038,8 @@ CONFIG_DRM_LIMA=m CONFIG_DRM_PANFROST=m CONFIG_DRM_PANTHOR=m CONFIG_DRM_TIDSS=m +CONFIG_DRM_ZYNQMP_DPSUB=m +CONFIG_DRM_ZYNQMP_DPSUB_AUDIO=y CONFIG_DRM_POWERVR=m CONFIG_FB=y CONFIG_FB_EFI=y @@ -1110,6 +1128,9 @@ CONFIG_SND_SOC_TEGRA210_MIXER=m CONFIG_SND_SOC_TEGRA_AUDIO_GRAPH_CARD=m CONFIG_SND_SOC_DAVINCI_MCASP=m CONFIG_SND_SOC_J721E_EVM=m +CONFIG_SND_SOC_XILINX_I2S=m +CONFIG_SND_SOC_XILINX_AUDIO_FORMATTER=m +CONFIG_SND_SOC_XILINX_SPDIF=m CONFIG_SND_SOC_AK4613=m CONFIG_SND_SOC_AK4619=m CONFIG_SND_SOC_DA7213=m @@ -1194,6 +1215,7 @@ CONFIG_USB_SERIAL_OPTION=m CONFIG_USB_QCOM_EUD=m CONFIG_USB_HSIC_USB3503=y CONFIG_USB_ONBOARD_DEV=m +CONFIG_USB_ONBOARD_DEV_USB5744=y CONFIG_NOP_USB_XCEIV=y CONFIG_USB_MXS_PHY=m CONFIG_USB_GADGET=y @@ -1297,6 +1319,8 @@ CONFIG_LEDS_TRIGGER_PANIC=y CONFIG_EDAC=y CONFIG_EDAC_GHES=y CONFIG_EDAC_LAYERSCAPE=m +CONFIG_EDAC_ZYNQMP=m +CONFIG_EDAC_VERSAL=m CONFIG_RTC_CLASS=y CONFIG_RTC_DRV_DS1307=m CONFIG_RTC_DRV_HYM8563=m @@ -1317,6 +1341,7 @@ CONFIG_RTC_DRV_DS3232=y CONFIG_RTC_DRV_PCF2127=m CONFIG_RTC_DRV_DA9063=m CONFIG_RTC_DRV_EFI=y +CONFIG_RTC_DRV_ZYNQMP=m CONFIG_RTC_DRV_CROS_EC=y CONFIG_RTC_DRV_FSL_FTM_ALARM=m CONFIG_RTC_DRV_S3C=y @@ -1348,6 +1373,9 @@ CONFIG_PL330_DMA=y CONFIG_TEGRA186_GPC_DMA=y CONFIG_TEGRA20_APB_DMA=y CONFIG_TEGRA210_ADMA=m +CONFIG_XILINX_DMA=m +CONFIG_XILINX_ZYNQMP_DMA=m +CONFIG_XILINX_ZYNQMP_DPDMA=m CONFIG_MTK_UART_APDMA=m CONFIG_QCOM_BAM_DMA=y CONFIG_QCOM_GPI_DMA=m @@ -1521,6 +1549,8 @@ CONFIG_CLK_RCAR_USB2_CLOCK_SEL=y CONFIG_CLK_RENESAS_VBATTB=m CONFIG_EXYNOS_ACPM_CLK=m CONFIG_CLK_SOPHGO_CV1800=y +CONFIG_XILINX_VCU=m +CONFIG_COMMON_CLK_XLNX_CLKWZRD=m CONFIG_HWSPINLOCK=y CONFIG_HWSPINLOCK_OMAP=m CONFIG_HWSPINLOCK_QCOM=y @@ -1637,6 +1667,8 @@ CONFIG_RZT2H_ADC=m CONFIG_SOPHGO_CV1800B_ADC=m CONFIG_TI_ADS1015=m CONFIG_TI_AM335X_ADC=m +CONFIG_XILINX_XADC=m +CONFIG_XILINX_AMS=m CONFIG_IIO_CROS_EC_SENSORS_CORE=m CONFIG_IIO_CROS_EC_SENSORS=m CONFIG_IIO_ST_LSM6DSX=m @@ -1670,7 +1702,9 @@ CONFIG_PWM_TEGRA=m CONFIG_PWM_TIECAP=m CONFIG_PWM_TIEHRPWM=m CONFIG_PWM_VISCONTI=m +CONFIG_PWM_XILINX=m CONFIG_SL28CPLD_INTC=y +CONFIG_XILINX_INTC=y CONFIG_QCOM_PDC=y CONFIG_QCOM_MPM=y CONFIG_TI_SCI_INTR_IRQCHIP=y @@ -1736,6 +1770,7 @@ CONFIG_PHY_UNIPHIER_USB3=y CONFIG_PHY_TEGRA_XUSB=y CONFIG_PHY_AM654_SERDES=m CONFIG_PHY_J721E_WIZ=m +CONFIG_PHY_XILINX_ZYNQMP=m CONFIG_ARM_CCI_PMU=m CONFIG_ARM_CCN=m CONFIG_ARM_CMN=m @@ -1769,14 +1804,18 @@ CONFIG_NVMEM_SNVS_LPGPR=y CONFIG_NVMEM_SPMI_SDAM=m CONFIG_NVMEM_SUNXI_SID=y CONFIG_NVMEM_UNIPHIER_EFUSE=y +CONFIG_NVMEM_ZYNQMP=m CONFIG_FPGA=y CONFIG_FPGA_MGR_ALTERA_CVP=m CONFIG_FPGA_MGR_STRATIX10_SOC=m CONFIG_FPGA_BRIDGE=m CONFIG_ALTERA_FREEZE_BRIDGE=m +CONFIG_XILINX_PR_DECOUPLER=m CONFIG_FPGA_REGION=m CONFIG_OF_FPGA_REGION=m CONFIG_OF_OVERLAY=y +CONFIG_FPGA_MGR_ZYNQMP_FPGA=m +CONFIG_FPGA_MGR_VERSAL_FPGA=m CONFIG_TEE=y CONFIG_OPTEE=y CONFIG_MUX_GPIO=m @@ -1871,6 +1910,9 @@ CONFIG_CRYPTO_DEV_FSL_DPAA2_CAAM=m CONFIG_CRYPTO_DEV_QCE=m CONFIG_CRYPTO_DEV_QCOM_RNG=m CONFIG_CRYPTO_DEV_TEGRA=m +CONFIG_CRYPTO_DEV_XILINX_TRNG=m +CONFIG_CRYPTO_DEV_ZYNQMP_AES=m +CONFIG_CRYPTO_DEV_ZYNQMP_SHA3=m CONFIG_CRYPTO_DEV_CCREE=m CONFIG_CRYPTO_DEV_HISI_SEC2=m CONFIG_CRYPTO_DEV_HISI_ZIP=m |
