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authorHeiko Stuebner <heiko.stuebner@cherry.de>2026-01-15 00:07:04 +0100
committerHeiko Stuebner <heiko@sntech.de>2026-01-16 14:47:28 +0100
commit6d60168c6d2f76917b3f71d2a6807c6d8dd24363 (patch)
tree7a6bcc4ab45a036647050ce774fa9ffd7a519123 /arch
parent4f3df9abf44bd92ecd5d8c3018ddefa7f5bf74d0 (diff)
arm64: dts: rockchip: Add HDMI node to RK3368
Add the HDMI controller node to the main SoC devicetree and hook it into the VOP. Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de> Link: https://patch.msgid.link/20260114230707.4175162-3-heiko@sntech.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm64/boot/dts/rockchip/rk3368.dtsi43
1 files changed, 43 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index f9e24b25274b..98d350768fd2 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -883,6 +883,11 @@
reg = <0>;
remote-endpoint = <&dsi_in_vop>;
};
+
+ vop_out_hdmi: endpoint@1 {
+ reg = <1>;
+ remote-endpoint = <&hdmi_in_vop>;
+ };
};
};
@@ -941,6 +946,37 @@
status = "disabled";
};
+ hdmi: hdmi@ff980000 {
+ compatible = "rockchip,rk3368-dw-hdmi";
+ reg = <0x0 0xff980000 0x0 0x20000>;
+ interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru PCLK_HDMI_CTRL>, <&cru SCLK_HDMI_HDCP>, <&cru SCLK_HDMI_CEC>;
+ clock-names = "iahb", "isfr", "cec";
+ pinctrl-names = "default";
+ pinctrl-0 = <&hdmi_i2c_xfer>;
+ power-domains = <&power RK3368_PD_VIO>;
+ reg-io-width = <4>;
+ rockchip,grf = <&grf>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ hdmi_in: port@0 {
+ reg = <0>;
+
+ hdmi_in_vop: endpoint {
+ remote-endpoint = <&vop_out_hdmi>;
+ };
+ };
+
+ hdmi_out: port@1 {
+ reg = <1>;
+ };
+ };
+ };
+
hevc_mmu: iommu@ff9a0440 {
compatible = "rockchip,iommu";
reg = <0x0 0xff9a0440 0x0 0x40>,
@@ -1204,6 +1240,13 @@
};
};
+ hdmi {
+ hdmi_i2c_xfer: hdmi-i2c-xfer {
+ rockchip,pins = <3 RK_PD2 1 &pcfg_pull_none>,
+ <3 RK_PD3 1 &pcfg_pull_none>;
+ };
+ };
+
i2c0 {
i2c0_xfer: i2c0-xfer {
rockchip,pins = <0 RK_PA6 1 &pcfg_pull_none>,