diff options
| author | Richard Zhu <hongxing.zhu@nxp.com> | 2025-10-15 11:04:19 +0800 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2025-11-12 09:51:28 +0800 |
| commit | 756d0ef76e8a3ab36e05ec03e876935d526c8d37 (patch) | |
| tree | 8668697230d6ad7809371ce037508b049dcd4abd /arch | |
| parent | dd93ee01a5056876be537b5bbb4a4a646b50982b (diff) | |
arm64: dts: imx95-19x19-evk: Add supports-clkreq property to PCIe M.2 port
According to PCIe r6.1, sec 5.5.1.
The following rules define how the L1.1 and L1.2 substates are entered:
Both the Upstream and Downstream Ports must monitor the logical state of
the CLKREQ# signal.
Typical implement is using open drain, which connect RC's clkreq# to
EP's clkreq# together and pull up clkreq#.
imx95-19x19-evk matches this requirement, so add supports-clkreq to
allow PCIe device enter ASPM L1 Sub-State.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts b/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts index 9f968feccef6..0f470d3eb9af 100644 --- a/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts +++ b/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts @@ -542,6 +542,7 @@ pinctrl-names = "default"; reset-gpio = <&i2c7_pcal6524 5 GPIO_ACTIVE_LOW>; vpcie-supply = <®_pcie0>; + supports-clkreq; status = "okay"; }; |