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authorAndrea della Porta <andrea.porta@suse.com>2025-12-18 20:09:08 +0100
committerFlorian Fainelli <florian.fainelli@broadcom.com>2025-12-19 12:42:30 -0800
commitbc97e616a70df55dfa893879db7ea65d225f7846 (patch)
tree48815bde8adce970c36563352583b2e56df984e7 /arch
parentce26f588c8310e0fdd1bc7524a86fdf0ef6b1c85 (diff)
arm64: dts: broadcom: bcm2712: fix RP1 endpoint PCI topology
The node describing the RP1 endpoint currently uses a specific name ('rp1_nexus') that does not correctly reflect the PCI topology. Update the DT with the correct topology and use generic node names. Additionally, since the driver dropped overlay support in favor of a fully described DT, rename '...-ovl-rp1.dts' to '...-base.dtsi' for inclusion in the board DTB, as it is no longer compiled as a standalone DTB. Signed-off-by: Andrea della Porta <andrea.porta@suse.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/827b12ba48bb47bc77a0f5e5617aea961c8bc6b5.1766077285.git.andrea.porta@suse.com Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm64/boot/dts/broadcom/Makefile1
-rw-r--r--arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-base.dtsi (renamed from arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dts)0
-rw-r--r--arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts39
3 files changed, 26 insertions, 14 deletions
diff --git a/arch/arm64/boot/dts/broadcom/Makefile b/arch/arm64/boot/dts/broadcom/Makefile
index 83d45afc6588..d43901404c95 100644
--- a/arch/arm64/boot/dts/broadcom/Makefile
+++ b/arch/arm64/boot/dts/broadcom/Makefile
@@ -7,7 +7,6 @@ dtb-$(CONFIG_ARCH_BCM2835) += bcm2711-rpi-400.dtb \
bcm2711-rpi-4-b.dtb \
bcm2711-rpi-cm4-io.dtb \
bcm2712-rpi-5-b.dtb \
- bcm2712-rpi-5-b-ovl-rp1.dtb \
bcm2712-d-rpi-5-b.dtb \
bcm2837-rpi-2-b.dtb \
bcm2837-rpi-3-a-plus.dtb \
diff --git a/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dts b/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-base.dtsi
index 04738bf281eb..04738bf281eb 100644
--- a/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dts
+++ b/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-base.dtsi
diff --git a/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts b/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts
index 3e0319fdb93f..285608281446 100644
--- a/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts
+++ b/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts
@@ -1,22 +1,16 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
- * bcm2712-rpi-5-b-ovl-rp1.dts is the overlay-ready DT which will make
- * the RP1 driver to load the RP1 dtb overlay at runtime, while
- * bcm2712-rpi-5-b.dts (this file) is the fully defined one (i.e. it
- * already contains RP1 node, so no overlay is loaded nor needed).
- * This file is intended to host the override nodes for the RP1 peripherals,
- * e.g. to declare the phy of the ethernet interface or the custom pin setup
- * for several RP1 peripherals.
- * This in turn is due to the fact that there's no current generic
- * infrastructure to reference nodes (i.e. the nodes in rp1-common.dtsi) that
- * are not yet defined in the DT since they are loaded at runtime via overlay.
+ * As a loose attempt to separate RP1 customizations from SoC peripherals
+ * definitioni, this file is intended to host the override nodes for the RP1
+ * peripherals, e.g. to declare the phy of the ethernet interface or custom
+ * pin setup.
* All other nodes that do not have anything to do with RP1 should be added
- * to the included bcm2712-rpi-5-b-ovl-rp1.dts instead.
+ * to the included bcm2712-rpi-5-b-base.dtsi instead.
*/
/dts-v1/;
-#include "bcm2712-rpi-5-b-ovl-rp1.dts"
+#include "bcm2712-rpi-5-b-base.dtsi"
/ {
aliases {
@@ -25,7 +19,26 @@
};
&pcie2 {
- #include "rp1-nexus.dtsi"
+ pci@0,0 {
+ reg = <0x0 0x0 0x0 0x0 0x0>;
+ ranges;
+ bus-range = <0 1>;
+ device_type = "pci";
+ #address-cells = <3>;
+ #size-cells = <2>;
+
+ dev@0,0 {
+ compatible = "pci1de4,1";
+ reg = <0x10000 0x0 0x0 0x0 0x0>;
+ ranges = <0x1 0x0 0x0 0x82010000 0x0 0x0 0x0 0x400000>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+
+ #include "rp1-common.dtsi"
+ };
+ };
};
&rp1_eth {