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authorMihai Sain <mihai.sain@microchip.com>2026-03-09 09:53:28 +0200
committerClaudiu Beznea <claudiu.beznea@tuxon.dev>2026-05-16 19:47:09 +0300
commitb6f6ebb0fb57ae6da622fb8fd4ebdc9ba1ae5756 (patch)
tree7dcdd33fc6af5b8052a3004fc9a9ab98752c5710 /drivers/clk/at91
parent254f49634ee16a731174d2ae34bc50bd5f45e731 (diff)
clk: at91: sam9x7: Fix gmac_gclk clock definition
According to the datasheet (see link section), table 12.1, instance ID 24 is used for the GMAC generic clock, while instance ID 67 is reserved. Add the correct gmac_gclk entry at ID 24, aligned with the SoC clock layout, and remove the old misplaced entry at ID 67. Link: https://ww1.microchip.com/downloads/aemDocuments/documents/MPU32/ProductDocuments/DataSheets/SAM9X75-SIP-Series-Data-Sheet-DS60001827.pdf Fixes: 33013b43e271 ("clk: at91: sam9x7: add sam9x7 pmc driver") Signed-off-by: Mihai Sain <mihai.sain@microchip.com> Link: https://lore.kernel.org/r/20260309075329.1528-4-mihai.sain@microchip.com [claudiu.beznea: massaged the patch description] Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Diffstat (limited to 'drivers/clk/at91')
-rw-r--r--drivers/clk/at91/sam9x7.c18
1 files changed, 9 insertions, 9 deletions
diff --git a/drivers/clk/at91/sam9x7.c b/drivers/clk/at91/sam9x7.c
index 89868a0aeaba..6b330c3e6bca 100644
--- a/drivers/clk/at91/sam9x7.c
+++ b/drivers/clk/at91/sam9x7.c
@@ -570,6 +570,15 @@ static const struct {
},
{
+ .n = "gmac_gclk",
+ .id = 24,
+ .pp = { "audiopll_divpmcck", "plla_div2pmcck", },
+ .pp_mux_table = { 6, 8, },
+ .pp_count = 2,
+ .pp_chg_id = INT_MIN,
+ },
+
+ {
.n = "lcd_gclk",
.id = 25,
.r = { .max = 75000000 },
@@ -702,15 +711,6 @@ static const struct {
.pp_count = 1,
.pp_chg_id = INT_MIN,
},
-
- {
- .n = "gmac_gclk",
- .id = 67,
- .pp = { "audiopll_divpmcck", "plla_div2pmcck", },
- .pp_mux_table = { 6, 8, },
- .pp_count = 2,
- .pp_chg_id = INT_MIN,
- },
};
static void __init sam9x7_pmc_setup(struct device_node *np)