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authorBjorn Helgaas <bhelgaas@google.com>2025-07-23 15:38:10 -0500
committerStephen Boyd <sboyd@kernel.org>2025-07-26 23:49:18 -0700
commit264200cc3a87d5c53bfa817227624fa2bae6b2c3 (patch)
tree5436ce1f8c92cda4f6dc7a92ce9163c8c167480a /drivers/clk/starfive
parent65df390bc2a7351c4bca123c62e853b35a215297 (diff)
clk: Fix typos
Fix typos, mostly in comments except CLKGATE_SEPERATED_* (definition and uses updated). Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Link: https://lore.kernel.org/r/20250723203819.2910289-1-helgaas@kernel.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/starfive')
-rw-r--r--drivers/clk/starfive/clk-starfive-jh7110-sys.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/starfive/clk-starfive-jh7110-sys.c b/drivers/clk/starfive/clk-starfive-jh7110-sys.c
index e9d8168d02b8..52833d4241c5 100644
--- a/drivers/clk/starfive/clk-starfive-jh7110-sys.c
+++ b/drivers/clk/starfive/clk-starfive-jh7110-sys.c
@@ -376,7 +376,7 @@ EXPORT_SYMBOL_GPL(jh7110_reset_controller_register);
/*
* This clock notifier is called when the rate of PLL0 clock is to be changed.
- * The cpu_root clock should save the curent parent clock and switch its parent
+ * The cpu_root clock should save the current parent clock and switch its parent
* clock to osc before PLL0 rate will be changed. Then switch its parent clock
* back after the PLL0 rate is completed.
*/