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| author | Jakub Kicinski <kuba@kernel.org> | 2024-01-05 07:58:21 -0800 |
|---|---|---|
| committer | Jakub Kicinski <kuba@kernel.org> | 2024-01-05 07:58:21 -0800 |
| commit | aa537fee6188583f938282b3b49324e11bc21485 (patch) | |
| tree | abb6c5cff16e3a0013bd697ca5dd148fd2fd86a5 /drivers/dpll/dpll_netlink.c | |
| parent | 82e7b22f647202ecd8f25de2bd3f1276bbd34989 (diff) | |
| parent | f035dca34ede00d667a3e2d16e1c731161eeacec (diff) | |
Merge branch 'dpll-expose-fractional-frequency-offset-value-to-user'
Jiri Pirko says:
====================
dpll: expose fractional frequency offset value to user
Allow to expose pin fractional frequency offset value over new DPLL
generic netlink attribute. Add an op to get the value from the driver.
Implement this new op in mlx5 driver.
====================
Link: https://lore.kernel.org/r/20240103132838.1501801-1-jiri@resnulli.us
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Diffstat (limited to 'drivers/dpll/dpll_netlink.c')
| -rw-r--r-- | drivers/dpll/dpll_netlink.c | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/drivers/dpll/dpll_netlink.c b/drivers/dpll/dpll_netlink.c index 21c627e9401a..3370dbddb86b 100644 --- a/drivers/dpll/dpll_netlink.c +++ b/drivers/dpll/dpll_netlink.c @@ -263,6 +263,27 @@ dpll_msg_add_phase_offset(struct sk_buff *msg, struct dpll_pin *pin, return 0; } +static int dpll_msg_add_ffo(struct sk_buff *msg, struct dpll_pin *pin, + struct dpll_pin_ref *ref, + struct netlink_ext_ack *extack) +{ + const struct dpll_pin_ops *ops = dpll_pin_ops(ref); + struct dpll_device *dpll = ref->dpll; + s64 ffo; + int ret; + + if (!ops->ffo_get) + return 0; + ret = ops->ffo_get(pin, dpll_pin_on_dpll_priv(dpll, pin), + dpll, dpll_priv(dpll), &ffo, extack); + if (ret) { + if (ret == -ENODATA) + return 0; + return ret; + } + return nla_put_sint(msg, DPLL_A_PIN_FRACTIONAL_FREQUENCY_OFFSET, ffo); +} + static int dpll_msg_add_pin_freq(struct sk_buff *msg, struct dpll_pin *pin, struct dpll_pin_ref *ref, struct netlink_ext_ack *extack) @@ -442,6 +463,9 @@ dpll_cmd_pin_get_one(struct sk_buff *msg, struct dpll_pin *pin, ret = dpll_msg_add_pin_phase_adjust(msg, pin, ref, extack); if (ret) return ret; + ret = dpll_msg_add_ffo(msg, pin, ref, extack); + if (ret) + return ret; if (xa_empty(&pin->parent_refs)) ret = dpll_msg_add_pin_dplls(msg, pin, extack); else |