diff options
| author | Mark Brown <broonie@kernel.org> | 2026-03-02 23:11:58 +0000 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2026-03-02 23:11:58 +0000 |
| commit | 4d4becffe425fd8a4ab6bea5a8cb6d23428bd657 (patch) | |
| tree | d2de896fd67aa4bcd71d1b91fbba4d2c5c1f6611 /drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | |
| parent | 4add09ab359c8caa6e65b2200911e1de66565eeb (diff) | |
| parent | e84141846decb77d2826e553318a608b256804e5 (diff) | |
regulator: pf9453: Fix IRQ trigger and allow
Merge series from Franz Schnyder <franz.schnyder@toradex.com>:
The IRQ_B pin is an open-drain output. The datasheet specifies, that the
IRQ_B pin is pulled low when any unmasked interrupt bit status
is changed, and it is released high once the application processor reads
the INT1 register. As it specifies a level-low behavior, it should not
force a falling-edge interrupt.
Remove the IRQF_TRIGGER_FALLING to not force the falling-edge interrupt
and instead rely on the flag from the device tree.
Set the IRQF_SHARED to be able to share the interrupt line with
other devices. If the interrupt has not been triggered by the PMIC,
return IRQ_NONE.
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_device.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 17 |
1 files changed, 10 insertions, 7 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c index d9789e0b5201..3e19b51a2763 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c @@ -7059,6 +7059,15 @@ pci_ers_result_t amdgpu_pci_slot_reset(struct pci_dev *pdev) dev_info(adev->dev, "PCI error: slot reset callback!!\n"); memset(&reset_context, 0, sizeof(reset_context)); + INIT_LIST_HEAD(&device_list); + hive = amdgpu_get_xgmi_hive(adev); + if (hive) { + mutex_lock(&hive->hive_lock); + list_for_each_entry(tmp_adev, &hive->device_list, gmc.xgmi.head) + list_add_tail(&tmp_adev->reset_list, &device_list); + } else { + list_add_tail(&adev->reset_list, &device_list); + } if (adev->pcie_reset_ctx.swus) link_dev = adev->pcie_reset_ctx.swus; @@ -7099,19 +7108,13 @@ pci_ers_result_t amdgpu_pci_slot_reset(struct pci_dev *pdev) reset_context.reset_req_dev = adev; set_bit(AMDGPU_NEED_FULL_RESET, &reset_context.flags); set_bit(AMDGPU_SKIP_COREDUMP, &reset_context.flags); - INIT_LIST_HEAD(&device_list); - hive = amdgpu_get_xgmi_hive(adev); if (hive) { - mutex_lock(&hive->hive_lock); reset_context.hive = hive; - list_for_each_entry(tmp_adev, &hive->device_list, gmc.xgmi.head) { + list_for_each_entry(tmp_adev, &hive->device_list, gmc.xgmi.head) tmp_adev->pcie_reset_ctx.in_link_reset = true; - list_add_tail(&tmp_adev->reset_list, &device_list); - } } else { set_bit(AMDGPU_SKIP_HW_RESET, &reset_context.flags); - list_add_tail(&adev->reset_list, &device_list); } r = amdgpu_device_asic_reset(adev, &device_list, &reset_context); |