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authorGangliang Xie <ganglxie@amd.com>2025-10-31 13:41:36 +0800
committerAlex Deucher <alexander.deucher@amd.com>2025-11-06 09:56:22 -0500
commit1349b31313d5bf840e0ffe780d17acafc4ef81f8 (patch)
tree9938fcada07a7dbe28f27c5fcc5d6e22b546ed5c /drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c
parenta448c40ff275d9506c859e9874048454c9791860 (diff)
drm/amdgpu: initialize max record count after table reset
initialize max record count and record offset after table reset Signed-off-by: Gangliang Xie <ganglxie@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c
index 3c646d9dad77..d7e2a81bc274 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c
@@ -459,6 +459,9 @@ int amdgpu_ras_eeprom_reset_table(struct amdgpu_ras_eeprom_control *control)
hdr->tbl_size = RAS_TABLE_HEADER_SIZE +
RAS_TABLE_V2_1_INFO_SIZE;
rai->rma_status = GPU_HEALTH_USABLE;
+
+ control->ras_record_offset = RAS_RECORD_START_V2_1;
+ control->ras_max_record_count = RAS_MAX_RECORD_COUNT_V2_1;
/**
* GPU health represented as a percentage.
* 0 means worst health, 100 means fully health.
@@ -469,6 +472,9 @@ int amdgpu_ras_eeprom_reset_table(struct amdgpu_ras_eeprom_control *control)
} else {
hdr->first_rec_offset = RAS_RECORD_START;
hdr->tbl_size = RAS_TABLE_HEADER_SIZE;
+
+ control->ras_record_offset = RAS_RECORD_START;
+ control->ras_max_record_count = RAS_MAX_RECORD_COUNT;
}
csum = __calc_hdr_byte_sum(control);