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authorAlex Deucher <alexander.deucher@amd.com>2024-04-14 22:25:50 -0400
committerAlex Deucher <alexander.deucher@amd.com>2024-05-08 15:17:06 -0400
commitc866201cdc2a05a7fe94009eda2644ceb54e8303 (patch)
tree884503bee60b3bfa4a91c3f95eb2dd92874623b1 /drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c
parent30f45a8ea46beba74710a75b3e1c4c54c22932b9 (diff)
drm/amdgpu/soc15: use common nbio callback to set remap offset
This fixes HDP flushes on systems with non-4K pages. Reviewed-by: Felix Kuehling <felix.kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c4
1 files changed, 0 insertions, 4 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c b/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c
index b684eb519d2a..fe18df10daaa 100644
--- a/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c
+++ b/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c
@@ -343,10 +343,6 @@ static void nbio_v7_4_init_registers(struct amdgpu_device *adev)
{
uint32_t baco_cntl;
- if (amdgpu_sriov_vf(adev))
- adev->rmmio_remap.reg_offset = SOC15_REG_OFFSET(NBIO, 0,
- mmBIF_BX_DEV0_EPF0_VF0_HDP_MEM_COHERENCY_FLUSH_CNTL) << 2;
-
if (amdgpu_ip_version(adev, NBIO_HWIP, 0) == IP_VERSION(7, 4, 4) &&
!amdgpu_sriov_vf(adev)) {
baco_cntl = RREG32_SOC15(NBIO, 0, mmBACO_CNTL);