diff options
author | Jack Xiao <Jack.Xiao@amd.com> | 2023-11-30 18:22:34 +0800 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2024-05-02 16:18:10 -0400 |
commit | 4632bec9fa682a231e4548dc793da2f1e209c798 (patch) | |
tree | e430d282daf12185e2454674670a4c68979d33f8 /drivers/gpu/drm/amd | |
parent | 46c47666106942389b022d05ea370bbf24c4494b (diff) |
drm/amdgpu/mes12: update data cache boundary
Enlarge the data cache boundary.
v2: use the fix data cache boundary.
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/mes_v12_0.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c b/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c index 8ab85e623192..2d713e7b976a 100644 --- a/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c +++ b/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c @@ -685,8 +685,8 @@ static int mes_v12_0_load_microcode(struct amdgpu_device *adev, WREG32_SOC15(GC, 0, regCP_MES_MDBASE_HI, upper_32_bits(adev->mes.data_fw_gpu_addr[pipe])); - /* Set 0x3FFFF (256K-1) to CP_MES_MDBOUND_LO */ - WREG32_SOC15(GC, 0, regCP_MES_MDBOUND_LO, 0x3FFFF); + /* Set data cache boundary CP_MES_MDBOUND_LO */ + WREG32_SOC15(GC, 0, regCP_MES_MDBOUND_LO, 0x7FFFF); if (prime_icache) { /* invalidate ICACHE */ |