diff options
| author | Candice Li <candice.li@amd.com> | 2025-12-05 09:16:26 +0800 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2025-12-10 17:38:13 -0500 |
| commit | 90254524ee84ef812e6329a14dd76e9f53db5023 (patch) | |
| tree | 4e9b52c26fd2005f15c248fd54882678686e47ad /drivers/gpu/drm/amd | |
| parent | d6e81483282143d80c495a84b1e3fda31e77dedb (diff) | |
drm/amd/ras: Add vram_type to ras_ta_init_flags
Add vram_type to ras_ta_init_flags.
Signed-off-by: Candice Li <candice.li@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd')
| -rw-r--r-- | drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_mgr.c | 1 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/ras/rascore/ras_psp.c | 1 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/ras/rascore/ras_psp.h | 1 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/ras/rascore/ras_ta_if.h | 1 |
4 files changed, 4 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_mgr.c b/drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_mgr.c index 923bddd0af3a..b86638fe0f32 100644 --- a/drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_mgr.c +++ b/drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_mgr.c @@ -216,6 +216,7 @@ static int amdgpu_ras_mgr_get_ras_ta_init_param(struct ras_core_context *ras_cor ras_ta_param->channel_dis_num = hweight32(adev->gmc.m_half_use) * 2; ras_ta_param->active_umc_mask = adev->umc.active_mask; + ras_ta_param->vram_type = (uint8_t)adev->gmc.vram_type; if (!amdgpu_ras_mgr_get_curr_nps_mode(adev, &nps_mode)) ras_ta_param->nps_mode = nps_mode; diff --git a/drivers/gpu/drm/amd/ras/rascore/ras_psp.c b/drivers/gpu/drm/amd/ras/rascore/ras_psp.c index ccdb42d2dd60..5d556e2a7000 100644 --- a/drivers/gpu/drm/amd/ras/rascore/ras_psp.c +++ b/drivers/gpu/drm/amd/ras/rascore/ras_psp.c @@ -507,6 +507,7 @@ static int send_load_ta_fw_cmd(struct ras_core_context *ras_core, ta_init_flags->channel_dis_num = ta_ctx->init_param.channel_dis_num; ta_init_flags->nps_mode = ta_ctx->init_param.nps_mode; ta_init_flags->active_umc_mask = ta_ctx->init_param.active_umc_mask; + ta_init_flags->vram_type = ta_ctx->init_param.vram_type; /* Setup load ras ta command */ memset(&psp_load_ta_cmd, 0, sizeof(psp_load_ta_cmd)); diff --git a/drivers/gpu/drm/amd/ras/rascore/ras_psp.h b/drivers/gpu/drm/amd/ras/rascore/ras_psp.h index 71776fecfd66..347f5334c3f3 100644 --- a/drivers/gpu/drm/amd/ras/rascore/ras_psp.h +++ b/drivers/gpu/drm/amd/ras/rascore/ras_psp.h @@ -51,6 +51,7 @@ struct ras_ta_init_param { uint8_t channel_dis_num; uint8_t nps_mode; uint32_t active_umc_mask; + uint8_t vram_type; }; struct gpu_mem_block { diff --git a/drivers/gpu/drm/amd/ras/rascore/ras_ta_if.h b/drivers/gpu/drm/amd/ras/rascore/ras_ta_if.h index 0921e36d3274..e910a75b3022 100644 --- a/drivers/gpu/drm/amd/ras/rascore/ras_ta_if.h +++ b/drivers/gpu/drm/amd/ras/rascore/ras_ta_if.h @@ -167,6 +167,7 @@ struct ras_ta_init_flags { uint8_t channel_dis_num; uint8_t nps_mode; uint32_t active_umc_mask; + uint8_t vram_type; }; struct ras_ta_mca_addr { |