diff options
author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2025-02-06 20:55:25 +0200 |
---|---|---|
committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2025-02-10 23:01:06 +0200 |
commit | b2479f7231d8b16c8cabf4ac1804204f6071728b (patch) | |
tree | 4e2976a6f75c6c514883498d3b122d3cc62bcaca /drivers/gpu/drm/i915/display/intel_crtc.c | |
parent | 429dd9a60d690c8dd8452785c71cc151e5012825 (diff) |
drm/i915: Convert intel_crtc.c to struct intel_display
struct intel_display will replace struct drm_i915_private as
the main thing for display code. Convert intel_crtc.c code to
use it.
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250206185533.32306-5-ville.syrjala@linux.intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_crtc.c')
-rw-r--r-- | drivers/gpu/drm/i915/display/intel_crtc.c | 57 |
1 files changed, 30 insertions, 27 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_crtc.c b/drivers/gpu/drm/i915/display/intel_crtc.c index e69b28779ac5..da2d6aeb2072 100644 --- a/drivers/gpu/drm/i915/display/intel_crtc.c +++ b/drivers/gpu/drm/i915/display/intel_crtc.c @@ -45,9 +45,9 @@ static void assert_vblank_disabled(struct drm_crtc *crtc) drm_crtc_vblank_put(crtc); } -struct intel_crtc *intel_first_crtc(struct drm_i915_private *i915) +struct intel_crtc *intel_first_crtc(struct intel_display *display) { - return to_intel_crtc(drm_crtc_from_index(&i915->drm, 0)); + return to_intel_crtc(drm_crtc_from_index(display->drm, 0)); } struct intel_crtc *intel_crtc_for_pipe(struct intel_display *display, @@ -68,10 +68,9 @@ void intel_crtc_wait_for_next_vblank(struct intel_crtc *crtc) drm_crtc_wait_one_vblank(&crtc->base); } -void intel_wait_for_vblank_if_active(struct drm_i915_private *i915, +void intel_wait_for_vblank_if_active(struct intel_display *display, enum pipe pipe) { - struct intel_display *display = &i915->display; struct intel_crtc *crtc = intel_crtc_for_pipe(display, pipe); if (crtc->active) @@ -93,7 +92,7 @@ u32 intel_crtc_get_vblank_counter(struct intel_crtc *crtc) u32 intel_crtc_max_vblank_count(const struct intel_crtc_state *crtc_state) { - struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); + struct intel_display *display = to_intel_display(crtc_state); /* * From Gen 11, in case of dsi cmd mode, frame counter wouldn't @@ -109,13 +108,13 @@ u32 intel_crtc_max_vblank_count(const struct intel_crtc_state *crtc_state) * On i965gm the hardware frame counter reads * zero when the TV encoder is enabled :( */ - if (IS_I965GM(dev_priv) && + if (display->platform.i965gm && (crtc_state->output_types & BIT(INTEL_OUTPUT_TVOUT))) return 0; - if (DISPLAY_VER(dev_priv) >= 5 || IS_G4X(dev_priv)) + if (DISPLAY_VER(display) >= 5 || display->platform.g4x) return 0xffffffff; /* full 32 bit counter */ - else if (DISPLAY_VER(dev_priv) >= 3) + else if (DISPLAY_VER(display) >= 3) return 0xffffff; /* only 24 bits of frame count */ else return 0; /* Gen2 doesn't have a hardware frame counter */ @@ -142,8 +141,8 @@ void intel_crtc_vblank_on(const struct intel_crtc_state *crtc_state) void intel_crtc_vblank_off(const struct intel_crtc_state *crtc_state) { + struct intel_display *display = to_intel_display(crtc_state); struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); - struct intel_display *display = to_intel_display(crtc); /* * Should really happen exactly when we disable the pipe @@ -304,8 +303,9 @@ static const struct drm_crtc_funcs i8xx_crtc_funcs = { .get_vblank_timestamp = intel_crtc_get_vblank_timestamp, }; -int intel_crtc_init(struct drm_i915_private *dev_priv, enum pipe pipe) +int intel_crtc_init(struct intel_display *display, enum pipe pipe) { + struct drm_i915_private *dev_priv = to_i915(display->drm); struct intel_plane *primary, *cursor; const struct drm_crtc_funcs *funcs; struct intel_crtc *crtc; @@ -316,9 +316,9 @@ int intel_crtc_init(struct drm_i915_private *dev_priv, enum pipe pipe) return PTR_ERR(crtc); crtc->pipe = pipe; - crtc->num_scalers = DISPLAY_RUNTIME_INFO(dev_priv)->num_scalers[pipe]; + crtc->num_scalers = DISPLAY_RUNTIME_INFO(display)->num_scalers[pipe]; - if (DISPLAY_VER(dev_priv) >= 9) + if (DISPLAY_VER(display) >= 9) primary = skl_universal_plane_create(dev_priv, pipe, PLANE_1); else primary = intel_primary_plane_create(dev_priv, pipe); @@ -330,7 +330,7 @@ int intel_crtc_init(struct drm_i915_private *dev_priv, enum pipe pipe) intel_init_fifo_underrun_reporting(dev_priv, crtc, false); - for_each_sprite(dev_priv, pipe, sprite) { + for_each_sprite(display, pipe, sprite) { struct intel_plane *plane; if (DISPLAY_VER(dev_priv) >= 9) @@ -351,32 +351,34 @@ int intel_crtc_init(struct drm_i915_private *dev_priv, enum pipe pipe) } crtc->plane_ids_mask |= BIT(cursor->id); - if (HAS_GMCH(dev_priv)) { - if (IS_CHERRYVIEW(dev_priv) || - IS_VALLEYVIEW(dev_priv) || IS_G4X(dev_priv)) + if (HAS_GMCH(display)) { + if (display->platform.cherryview || + display->platform.valleyview || + display->platform.g4x) funcs = &g4x_crtc_funcs; - else if (DISPLAY_VER(dev_priv) == 4) + else if (DISPLAY_VER(display) == 4) funcs = &i965_crtc_funcs; - else if (IS_I945GM(dev_priv) || IS_I915GM(dev_priv)) + else if (display->platform.i945gm || + display->platform.i915gm) funcs = &i915gm_crtc_funcs; - else if (DISPLAY_VER(dev_priv) == 3) + else if (DISPLAY_VER(display) == 3) funcs = &i915_crtc_funcs; else funcs = &i8xx_crtc_funcs; } else { - if (DISPLAY_VER(dev_priv) >= 8) + if (DISPLAY_VER(display) >= 8) funcs = &bdw_crtc_funcs; else funcs = &ilk_crtc_funcs; } - ret = drm_crtc_init_with_planes(&dev_priv->drm, &crtc->base, + ret = drm_crtc_init_with_planes(display->drm, &crtc->base, &primary->base, &cursor->base, funcs, "pipe %c", pipe_name(pipe)); if (ret) goto fail; - if (DISPLAY_VER(dev_priv) >= 11) + if (DISPLAY_VER(display) >= 11) drm_crtc_create_scaling_filter_property(&crtc->base, BIT(DRM_SCALING_FILTER_DEFAULT) | BIT(DRM_SCALING_FILTER_NEAREST_NEIGHBOR)); @@ -387,7 +389,7 @@ int intel_crtc_init(struct drm_i915_private *dev_priv, enum pipe pipe) cpu_latency_qos_add_request(&crtc->vblank_pm_qos, PM_QOS_DEFAULT_VALUE); - drm_WARN_ON(&dev_priv->drm, drm_crtc_index(&crtc->base) != crtc->pipe); + drm_WARN_ON(display->drm, drm_crtc_index(&crtc->base) != crtc->pipe); return 0; @@ -512,7 +514,7 @@ int intel_scanlines_to_usecs(const struct drm_display_mode *adjusted_mode, void intel_pipe_update_start(struct intel_atomic_state *state, struct intel_crtc *crtc) { - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); + struct intel_display *display = to_intel_display(state); const struct intel_crtc_state *old_crtc_state = intel_atomic_get_old_crtc_state(state, crtc); struct intel_crtc_state *new_crtc_state = @@ -546,7 +548,7 @@ void intel_pipe_update_start(struct intel_atomic_state *state, intel_vblank_evade_init(old_crtc_state, new_crtc_state, &evade); - if (drm_WARN_ON(&dev_priv->drm, drm_crtc_vblank_get(&crtc->base))) + if (drm_WARN_ON(display->drm, drm_crtc_vblank_get(&crtc->base))) goto irq_disable; /* @@ -649,6 +651,7 @@ void intel_crtc_prepare_vblank_event(struct intel_crtc_state *crtc_state, void intel_pipe_update_end(struct intel_atomic_state *state, struct intel_crtc *crtc) { + struct intel_display *display = to_intel_display(state); struct intel_crtc_state *new_crtc_state = intel_atomic_get_new_crtc_state(state, crtc); enum pipe pipe = crtc->pipe; @@ -666,7 +669,7 @@ void intel_pipe_update_end(struct intel_atomic_state *state, * Incase of mipi dsi command mode, we need to set frame update * request for every commit. */ - if (DISPLAY_VER(dev_priv) >= 11 && + if (DISPLAY_VER(display) >= 11 && intel_crtc_has_type(new_crtc_state, INTEL_OUTPUT_DSI)) icl_dsi_frame_update(new_crtc_state); @@ -723,7 +726,7 @@ void intel_pipe_update_end(struct intel_atomic_state *state, if (crtc->debug.start_vbl_count && crtc->debug.start_vbl_count != end_vbl_count) { - drm_err(&dev_priv->drm, + drm_err(display->drm, "Atomic update failure on pipe %c (start=%u end=%u) time %lld us, min %d, max %d, scanline start %d, end %d\n", pipe_name(pipe), crtc->debug.start_vbl_count, end_vbl_count, |