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authorMatt Roper <matthew.d.roper@intel.com>2023-08-10 16:46:20 -0700
committerMatt Roper <matthew.d.roper@intel.com>2023-08-17 15:41:30 -0700
commit4ebf43d0488f65f50fffa35e16b60fcede3f477c (patch)
tree1dc03e770643bdf16e370838084efb57329360e7 /drivers/gpu/drm/i915/display/intel_display_device.h
parent3d623691ca300676699a56d5ec154ebcbe5d63eb (diff)
drm/i915: Eliminate has_4tile feature flag
We don't really need a feature flag for has_4tile since there's a well-defined cutover point (DG2) at which all new platforms started using Tile4 as their Y-major tiling layout. The GT side of the code already handles Tile4 vs legacy TileY with checks on the IP version rather than looking at the feature flag, and we can simplify the display code similarly (which will also make it more self-contained for re-use in the Xe driver). Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Haridhar Kalvala <haridhar.kalvala@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230810234618.3738870-4-matthew.d.roper@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_display_device.h')
-rw-r--r--drivers/gpu/drm/i915/display/intel_display_device.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
index 215e682bd8b7..eb630a946343 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.h
+++ b/drivers/gpu/drm/i915/display/intel_display_device.h
@@ -32,6 +32,7 @@ struct drm_printer;
func(overlay_needs_physical); \
func(supports_tv);
+#define HAS_4TILE(i915) (IS_DG2(i915) || DISPLAY_VER(i915) >= 14)
#define HAS_ASYNC_FLIPS(i915) (DISPLAY_VER(i915) >= 5)
#define HAS_CDCLK_CRAWL(i915) (DISPLAY_INFO(i915)->has_cdclk_crawl)
#define HAS_CDCLK_SQUASH(i915) (DISPLAY_INFO(i915)->has_cdclk_squash)