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authorVille Syrjälä <ville.syrjala@linux.intel.com>2021-10-01 16:01:05 +0300
committerVille Syrjälä <ville.syrjala@linux.intel.com>2021-10-04 13:04:36 +0300
commitd0920a45574c15a8fc00ccdff65da3b801438757 (patch)
treed26d7318e7547816ed1e1794c47e75e8eb63f993 /drivers/gpu/drm/i915/display/intel_snps_phy.c
parent3e022c1f0a5fcdc0192fc497c63efdadd8c5b3c4 (diff)
drm/i915: Pass the lane to intel_ddi_level()
In order to have per-lane drive settings we need intel_ddi_level() to accept the lane as a parameter. That is, the eventual goal is to call intel_ddi_level() once for each lane. For now we just pass in a hardcoded 0 and use the same settings for every lane. Ie. no change in behaviour yet. Reviewed-by: Imre Deak <imre.deak@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20211001130107.1746-9-ville.syrjala@linux.intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_snps_phy.c')
-rw-r--r--drivers/gpu/drm/i915/display/intel_snps_phy.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_snps_phy.c b/drivers/gpu/drm/i915/display/intel_snps_phy.c
index 7a9771dbb63f..b18f08c851dc 100644
--- a/drivers/gpu/drm/i915/display/intel_snps_phy.c
+++ b/drivers/gpu/drm/i915/display/intel_snps_phy.c
@@ -58,7 +58,7 @@ void intel_snps_phy_set_signal_levels(struct intel_encoder *encoder,
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
const struct intel_ddi_buf_trans *trans;
enum phy phy = intel_port_to_phy(dev_priv, encoder->port);
- int level = intel_ddi_level(encoder, crtc_state);
+ int level = intel_ddi_level(encoder, crtc_state, 0);
int n_entries, ln;
trans = encoder->get_buf_trans(encoder, crtc_state, &n_entries);