drm/i915/pciids: switch to xe driver style PCI ID macros

The PCI ID macros in xe_pciids.h allow passing in the macro to operate
on each PCI ID, making it more flexible. Convert i915_pciids.h to the
same pattern.

INTEL_IVB_Q_IDS() for Quanta transcode remains a special case, and
unconditionally uses INTEL_QUANTA_VGA_DEVICE().

Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: linux-pci@vger.kernel.org
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240515165651.1230465-1-jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>

1 files changed, 44 insertions, 44 deletions

diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
index a39497971994..82bb34416fb1 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -131,77 +131,77 @@ void intel_device_info_print(const struct intel_device_info *info,
 #define INTEL_VGA_DEVICE(id, info) (id)
 
 static const u16 subplatform_ult_ids[] = {
-	INTEL_HSW_ULT_GT1_IDS(0),
-	INTEL_HSW_ULT_GT2_IDS(0),
-	INTEL_HSW_ULT_GT3_IDS(0),
-	INTEL_BDW_ULT_GT1_IDS(0),
-	INTEL_BDW_ULT_GT2_IDS(0),
-	INTEL_BDW_ULT_GT3_IDS(0),
-	INTEL_BDW_ULT_RSVD_IDS(0),
-	INTEL_SKL_ULT_GT1_IDS(0),
-	INTEL_SKL_ULT_GT2_IDS(0),
-	INTEL_SKL_ULT_GT3_IDS(0),
-	INTEL_KBL_ULT_GT1_IDS(0),
-	INTEL_KBL_ULT_GT2_IDS(0),
-	INTEL_KBL_ULT_GT3_IDS(0),
-	INTEL_CFL_U_GT2_IDS(0),
-	INTEL_CFL_U_GT3_IDS(0),
-	INTEL_WHL_U_GT1_IDS(0),
-	INTEL_WHL_U_GT2_IDS(0),
-	INTEL_WHL_U_GT3_IDS(0),
-	INTEL_CML_U_GT1_IDS(0),
-	INTEL_CML_U_GT2_IDS(0),
+	INTEL_HSW_ULT_GT1_IDS(INTEL_VGA_DEVICE, 0),
+	INTEL_HSW_ULT_GT2_IDS(INTEL_VGA_DEVICE, 0),
+	INTEL_HSW_ULT_GT3_IDS(INTEL_VGA_DEVICE, 0),
+	INTEL_BDW_ULT_GT1_IDS(INTEL_VGA_DEVICE, 0),
+	INTEL_BDW_ULT_GT2_IDS(INTEL_VGA_DEVICE, 0),
+	INTEL_BDW_ULT_GT3_IDS(INTEL_VGA_DEVICE, 0),
+	INTEL_BDW_ULT_RSVD_IDS(INTEL_VGA_DEVICE, 0),
+	INTEL_SKL_ULT_GT1_IDS(INTEL_VGA_DEVICE, 0),
+	INTEL_SKL_ULT_GT2_IDS(INTEL_VGA_DEVICE, 0),
+	INTEL_SKL_ULT_GT3_IDS(INTEL_VGA_DEVICE, 0),
+	INTEL_KBL_ULT_GT1_IDS(INTEL_VGA_DEVICE, 0),
+	INTEL_KBL_ULT_GT2_IDS(INTEL_VGA_DEVICE, 0),
+	INTEL_KBL_ULT_GT3_IDS(INTEL_VGA_DEVICE, 0),
+	INTEL_CFL_U_GT2_IDS(INTEL_VGA_DEVICE, 0),
+	INTEL_CFL_U_GT3_IDS(INTEL_VGA_DEVICE, 0),
+	INTEL_WHL_U_GT1_IDS(INTEL_VGA_DEVICE, 0),
+	INTEL_WHL_U_GT2_IDS(INTEL_VGA_DEVICE, 0),
+	INTEL_WHL_U_GT3_IDS(INTEL_VGA_DEVICE, 0),
+	INTEL_CML_U_GT1_IDS(INTEL_VGA_DEVICE, 0),
+	INTEL_CML_U_GT2_IDS(INTEL_VGA_DEVICE, 0),
 };
 
 static const u16 subplatform_ulx_ids[] = {
-	INTEL_HSW_ULX_GT1_IDS(0),
-	INTEL_HSW_ULX_GT2_IDS(0),
-	INTEL_BDW_ULX_GT1_IDS(0),
-	INTEL_BDW_ULX_GT2_IDS(0),
-	INTEL_BDW_ULX_GT3_IDS(0),
-	INTEL_BDW_ULX_RSVD_IDS(0),
-	INTEL_SKL_ULX_GT1_IDS(0),
-	INTEL_SKL_ULX_GT2_IDS(0),
-	INTEL_KBL_ULX_GT1_IDS(0),
-	INTEL_KBL_ULX_GT2_IDS(0),
-	INTEL_AML_KBL_GT2_IDS(0),
-	INTEL_AML_CFL_GT2_IDS(0),
+	INTEL_HSW_ULX_GT1_IDS(INTEL_VGA_DEVICE, 0),
+	INTEL_HSW_ULX_GT2_IDS(INTEL_VGA_DEVICE, 0),
+	INTEL_BDW_ULX_GT1_IDS(INTEL_VGA_DEVICE, 0),
+	INTEL_BDW_ULX_GT2_IDS(INTEL_VGA_DEVICE, 0),
+	INTEL_BDW_ULX_GT3_IDS(INTEL_VGA_DEVICE, 0),
+	INTEL_BDW_ULX_RSVD_IDS(INTEL_VGA_DEVICE, 0),
+	INTEL_SKL_ULX_GT1_IDS(INTEL_VGA_DEVICE, 0),
+	INTEL_SKL_ULX_GT2_IDS(INTEL_VGA_DEVICE, 0),
+	INTEL_KBL_ULX_GT1_IDS(INTEL_VGA_DEVICE, 0),
+	INTEL_KBL_ULX_GT2_IDS(INTEL_VGA_DEVICE, 0),
+	INTEL_AML_KBL_GT2_IDS(INTEL_VGA_DEVICE, 0),
+	INTEL_AML_CFL_GT2_IDS(INTEL_VGA_DEVICE, 0),
 };
 
 static const u16 subplatform_portf_ids[] = {
-	INTEL_ICL_PORT_F_IDS(0),
+	INTEL_ICL_PORT_F_IDS(INTEL_VGA_DEVICE, 0),
 };
 
 static const u16 subplatform_uy_ids[] = {
-	INTEL_TGL_GT2_IDS(0),
+	INTEL_TGL_GT2_IDS(INTEL_VGA_DEVICE, 0),
 };
 
 static const u16 subplatform_n_ids[] = {
-	INTEL_ADLN_IDS(0),
+	INTEL_ADLN_IDS(INTEL_VGA_DEVICE, 0),
 };
 
 static const u16 subplatform_rpl_ids[] = {
-	INTEL_RPLS_IDS(0),
-	INTEL_RPLU_IDS(0),
-	INTEL_RPLP_IDS(0),
+	INTEL_RPLS_IDS(INTEL_VGA_DEVICE, 0),
+	INTEL_RPLU_IDS(INTEL_VGA_DEVICE, 0),
+	INTEL_RPLP_IDS(INTEL_VGA_DEVICE, 0),
 };
 
 static const u16 subplatform_rplu_ids[] = {
-	INTEL_RPLU_IDS(0),
+	INTEL_RPLU_IDS(INTEL_VGA_DEVICE, 0),
 };
 
 static const u16 subplatform_g10_ids[] = {
-	INTEL_DG2_G10_IDS(0),
-	INTEL_ATS_M150_IDS(0),
+	INTEL_DG2_G10_IDS(INTEL_VGA_DEVICE, 0),
+	INTEL_ATS_M150_IDS(INTEL_VGA_DEVICE, 0),
 };
 
 static const u16 subplatform_g11_ids[] = {
-	INTEL_DG2_G11_IDS(0),
-	INTEL_ATS_M75_IDS(0),
+	INTEL_DG2_G11_IDS(INTEL_VGA_DEVICE, 0),
+	INTEL_ATS_M75_IDS(INTEL_VGA_DEVICE, 0),
 };
 
 static const u16 subplatform_g12_ids[] = {
-	INTEL_DG2_G12_IDS(0),
+	INTEL_DG2_G12_IDS(INTEL_VGA_DEVICE, 0),
 };
 
 static bool find_devid(u16 id, const u16 *p, unsigned int num)