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authorDave Airlie <airlied@redhat.com>2026-03-31 16:38:49 +1000
committerDave Airlie <airlied@redhat.com>2026-03-31 16:38:50 +1000
commit28899037b85e77490f202fa9361c3c2780be3ec2 (patch)
treebbe3497523d520a86923e8affb6aabd737fb90bb /drivers/gpu/drm/i915/selftests
parentf6225b546dfccfc322b18c0d757b7b9c767a1e27 (diff)
parente012fa31f90de0928d85ab22d9cc5fc8fe84c5b0 (diff)
Merge tag 'drm-intel-next-2026-03-30' of https://gitlab.freedesktop.org/drm/i915/kernel into drm-next
drm/i915 feature pull #2 for v7.1: Refactoring and cleanups: - Refactor LT PHY PLL handling to use the DPLL framework (Mika) - Implement display register polling and waits in display code (Ville) - Move PCH clock gating in display PCH file (Luca) - Add shared stepping info header for i915 and display (Jani) - Clean up GVT I2C command decoding (Jonathan) - NV12 plane unlinking cleanups (Ville) - Clean up NV12 DDB/watermark handling for pre-ICL platforms (Ville) Fixes: - An assortment of DSI fixes (Ville) - Handle PORT_NONE in assert_port_valid() (Jonathan) - Fix link failure without FBDEV emulation (Arnd Bergmann) - Quirk disable panel replay on certain Dell XPS models (Jouni) - Check if VESA DPCD AUX backlight is possible (Suraj) Other: - Mailmap update for Christoph (Christoph) Signed-off-by: Dave Airlie <airlied@redhat.com> # Conflicts: # drivers/gpu/drm/i915/display/intel_plane.c From: Jani Nikula <jani.nikula@intel.com> Link: https://patch.msgid.link/ac9dfdb745d5a67c519ea150a6f36f8f74b8760e@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/selftests')
-rw-r--r--drivers/gpu/drm/i915/selftests/intel_uncore.c62
1 files changed, 0 insertions, 62 deletions
diff --git a/drivers/gpu/drm/i915/selftests/intel_uncore.c b/drivers/gpu/drm/i915/selftests/intel_uncore.c
index 507bf42a1aaf..514d2200751b 100644
--- a/drivers/gpu/drm/i915/selftests/intel_uncore.c
+++ b/drivers/gpu/drm/i915/selftests/intel_uncore.c
@@ -272,67 +272,6 @@ out_rpm:
return err;
}
-static int live_forcewake_domains(void *arg)
-{
-#define FW_RANGE 0x40000
- struct intel_gt *gt = arg;
- struct intel_uncore *uncore = gt->uncore;
- struct drm_i915_private *i915 = gt->i915;
- struct intel_display *display = i915->display;
- unsigned long *valid;
- u32 offset;
- int err;
-
- if (!HAS_FPGA_DBG_UNCLAIMED(display) &&
- !IS_VALLEYVIEW(i915) &&
- !IS_CHERRYVIEW(i915))
- return 0;
-
- /*
- * This test may lockup the machine or cause GPU hangs afterwards.
- */
- if (!IS_ENABLED(CONFIG_DRM_I915_SELFTEST_BROKEN))
- return 0;
-
- valid = bitmap_zalloc(FW_RANGE, GFP_KERNEL);
- if (!valid)
- return -ENOMEM;
-
- intel_uncore_forcewake_get(uncore, FORCEWAKE_ALL);
-
- check_for_unclaimed_mmio(uncore);
- for (offset = 0; offset < FW_RANGE; offset += 4) {
- i915_reg_t reg = { offset };
-
- intel_uncore_posting_read_fw(uncore, reg);
- if (!check_for_unclaimed_mmio(uncore))
- set_bit(offset, valid);
- }
-
- intel_uncore_forcewake_put(uncore, FORCEWAKE_ALL);
-
- err = 0;
- for_each_set_bit(offset, valid, FW_RANGE) {
- i915_reg_t reg = { offset };
-
- iosf_mbi_punit_acquire();
- intel_uncore_forcewake_reset(uncore);
- iosf_mbi_punit_release();
-
- check_for_unclaimed_mmio(uncore);
-
- intel_uncore_posting_read_fw(uncore, reg);
- if (check_for_unclaimed_mmio(uncore)) {
- pr_err("Unclaimed mmio read to register 0x%04x\n",
- offset);
- err = -EINVAL;
- }
- }
-
- bitmap_free(valid);
- return err;
-}
-
static int live_fw_table(void *arg)
{
struct intel_gt *gt = arg;
@@ -348,7 +287,6 @@ int intel_uncore_live_selftests(struct drm_i915_private *i915)
static const struct i915_subtest tests[] = {
SUBTEST(live_fw_table),
SUBTEST(live_forcewake_ops),
- SUBTEST(live_forcewake_domains),
};
return intel_gt_live_subtests(tests, to_gt(i915));