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| author | Olof Johansson <olof@lixom.net> | 2014-07-22 09:17:18 -0700 |
|---|---|---|
| committer | Olof Johansson <olof@lixom.net> | 2014-07-22 09:17:18 -0700 |
| commit | e9a86d96be0dff611156ea89fbb6eb91478bddab (patch) | |
| tree | ad38c21c76e1c275264cb20482a7f2bdd54618ba /drivers/gpu/drm/radeon/si.c | |
| parent | fc3791f3a95df5b76ecbda6952c13ff67251fd10 (diff) | |
| parent | ad8adbf2c7d6269d0100f7f460f4837ece060977 (diff) | |
Merge tag 'sti-defconfig-for-v3.17-1' of git://git.stlinux.com/devel/kernel/linux-sti into next/defconfig
Merge "ARM: STi: defconfig changes for v3.17" from Maxime Coquelin:
STi defconfig updates for v3.17
- Enable ST's Thermal controller driver
- Enable ST's Keyscan driver
- Enable ST's MiPHY365 Phy driver for STiH416 SATA & PCIe
- Enable ST's AHCI driver.
* tag 'sti-defconfig-for-v3.17-1' of git://git.stlinux.com/devel/kernel/linux-sti:
ARM: multi_v7_defconfig: Enable MiPHY365x - ST's Generic (SATA & PCIe) PHY
ARM: multi_v7_defconfig: Enable ST's (S)ATA driver
ARM: multi_v7_defconfig: add ST Keyscan driver
ARM: update multi_v7_defconfig for STI
ARM: multi_v7_defconfig: Configure in ST's Thermal Controller
+ Linux 3.16-rc6
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'drivers/gpu/drm/radeon/si.c')
| -rw-r--r-- | drivers/gpu/drm/radeon/si.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c index 730cee2c34cf..eba0225259a4 100644 --- a/drivers/gpu/drm/radeon/si.c +++ b/drivers/gpu/drm/radeon/si.c @@ -6376,14 +6376,16 @@ restart_ih: case 147: addr = RREG32(VM_CONTEXT1_PROTECTION_FAULT_ADDR); status = RREG32(VM_CONTEXT1_PROTECTION_FAULT_STATUS); + /* reset addr and status */ + WREG32_P(VM_CONTEXT1_CNTL2, 1, ~1); + if (addr == 0x0 && status == 0x0) + break; dev_err(rdev->dev, "GPU fault detected: %d 0x%08x\n", src_id, src_data); dev_err(rdev->dev, " VM_CONTEXT1_PROTECTION_FAULT_ADDR 0x%08X\n", addr); dev_err(rdev->dev, " VM_CONTEXT1_PROTECTION_FAULT_STATUS 0x%08X\n", status); si_vm_decode_fault(rdev, status, addr); - /* reset addr and status */ - WREG32_P(VM_CONTEXT1_CNTL2, 1, ~1); break; case 176: /* RINGID0 CP_INT */ radeon_fence_process(rdev, RADEON_RING_TYPE_GFX_INDEX); |