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authorMatthew Auld <matthew.auld@intel.com>2026-06-26 12:15:24 +0100
committerMatthew Auld <matthew.auld@intel.com>2026-07-10 12:50:08 +0100
commit0c9a7926bd8edbeb6e416afdf07cfd8a96d56e20 (patch)
tree5776abb037c4bf3318d4f5bf28761954cc0f086c /drivers/gpu/drm/xe/abi
parent72670b90a0a767b0a097139790e56d5fc167ae50 (diff)
drm/xe/guc: add the plumbing for GUC_PAGING_CLASS
On newer platforms, the GuC has a new engine class which we need to use to refer to the dedicated/reserved KMD BCS engine. With that, add the plumbing in the GuC backend to support GUC_PAGING_CLASS and GUC_CAPTURE_LIST_CLASS_PAGING. Currently this is still turned off. v2 (Daniele) - Also add adjust the capture list for hpg, so we account for nvl-s. - Move single paging engine assert to a more natural place. Signed-off-by: Matthew Auld <matthew.auld@intel.com> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Link: https://patch.msgid.link/20260626111520.487997-15-matthew.auld@intel.com
Diffstat (limited to 'drivers/gpu/drm/xe/abi')
-rw-r--r--drivers/gpu/drm/xe/abi/guc_capture_abi.h3
-rw-r--r--drivers/gpu/drm/xe/abi/guc_scheduler_abi.h3
2 files changed, 4 insertions, 2 deletions
diff --git a/drivers/gpu/drm/xe/abi/guc_capture_abi.h b/drivers/gpu/drm/xe/abi/guc_capture_abi.h
index dd4117553739..ff9c0ae34a28 100644
--- a/drivers/gpu/drm/xe/abi/guc_capture_abi.h
+++ b/drivers/gpu/drm/xe/abi/guc_capture_abi.h
@@ -32,9 +32,10 @@ enum guc_capture_list_class_type {
GUC_CAPTURE_LIST_CLASS_VIDEOENHANCE = 2,
GUC_CAPTURE_LIST_CLASS_BLITTER = 3,
GUC_CAPTURE_LIST_CLASS_GSC_OTHER = 4,
+ GUC_CAPTURE_LIST_CLASS_PAGING = 5,
};
-#define GUC_CAPTURE_LIST_CLASS_MAX (GUC_CAPTURE_LIST_CLASS_GSC_OTHER + 1)
+#define GUC_CAPTURE_LIST_CLASS_MAX (GUC_CAPTURE_LIST_CLASS_PAGING + 1)
/**
* struct guc_mmio_reg - GuC MMIO reg state struct
diff --git a/drivers/gpu/drm/xe/abi/guc_scheduler_abi.h b/drivers/gpu/drm/xe/abi/guc_scheduler_abi.h
index 19ec89bf39c5..85bba34277ed 100644
--- a/drivers/gpu/drm/xe/abi/guc_scheduler_abi.h
+++ b/drivers/gpu/drm/xe/abi/guc_scheduler_abi.h
@@ -21,7 +21,8 @@
#define GUC_BLITTER_CLASS 3
#define GUC_COMPUTE_CLASS 4
#define GUC_GSC_OTHER_CLASS 5
-#define GUC_LAST_ENGINE_CLASS GUC_GSC_OTHER_CLASS
+#define GUC_PAGING_CLASS 6
+#define GUC_LAST_ENGINE_CLASS GUC_PAGING_CLASS
#define GUC_MAX_ENGINE_CLASSES 16
#define GUC_MAX_INSTANCES_PER_CLASS 32