diff options
| author | Imre Deak <imre.deak@intel.com> | 2025-08-05 10:36:52 +0300 |
|---|---|---|
| committer | Imre Deak <imre.deak@intel.com> | 2025-08-13 15:03:07 +0300 |
| commit | 08d4fb9548d777fa1a7099beeade8888598f1323 (patch) | |
| tree | 4ba73779807570601684aa63123e59fa81f6534b /drivers/gpu/drm | |
| parent | 4ae33f0a5d1cef2830c364fd7dd6260ebfda9abd (diff) | |
drm/i915/tc: Handle pin assignment NONE on all platforms
For consistency, handle pin assignment NONE on all platforms similarly
to LNL+. On earlier platforms the driver doesn't actually see this pin
assignment - as it's not valid on a connected DP-alt PHY - however it's
a valid HW setting even on those platforms, for instance in legacy mode.
Handle this pin assignment on earlier platforms as well, so that the way
to query the pin assignment can be unified by a follow-up change.
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Link: https://lore.kernel.org/r/20250805073700.642107-12-imre.deak@intel.com
Signed-off-by: Imre Deak <imre.deak@intel.com>
Diffstat (limited to 'drivers/gpu/drm')
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_tc.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c index 31663029642a..d1f17d2f236c 100644 --- a/drivers/gpu/drm/i915/display/intel_tc.c +++ b/drivers/gpu/drm/i915/display/intel_tc.c @@ -334,6 +334,8 @@ static int mtl_tc_port_get_max_lane_count(struct intel_digital_port *dig_port) pin_assignment = intel_tc_port_get_pin_assignment(dig_port); switch (pin_assignment) { + case INTEL_TC_PIN_ASSIGNMENT_NONE: + return 0; default: MISSING_CASE(pin_assignment); fallthrough; |