diff options
| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2025-09-23 20:19:40 +0300 |
|---|---|---|
| committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2025-10-11 03:48:06 +0300 |
| commit | 4b044b1368fa85f27f2d2121b720a5ef5db128e3 (patch) | |
| tree | 1bfac7ea1e3a73364032da50beea3a061c93c8d0 /drivers/gpu/drm | |
| parent | e76f0dd3782a56839bb9e0c0a95464d31bf9790b (diff) | |
drm/i915/cdclk: Use enabled_pipes instead of active_pipes for the glk audio w/a
Currently we are considering the set of active pipes when
determining if we need to boost the cdclk due to glk audio
issues. Replace that with the set of logically enabled pipes
instead. That is generally how everything else cdclk related
is computed (cdclk_state->logical is based on logically
enabled pipes).
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250923171943.7319-19-ville.syrjala@linux.intel.com
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Diffstat (limited to 'drivers/gpu/drm')
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_cdclk.c | 16 |
1 files changed, 13 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c index a08933e769ae..ae7fa3e172c9 100644 --- a/drivers/gpu/drm/i915/display/intel_cdclk.c +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c @@ -146,6 +146,9 @@ struct intel_cdclk_state { /* forced minimum cdclk for glk+ audio w/a */ int force_min_cdclk; + /* bitmask of enabled pipes */ + u8 enabled_pipes; + /* bitmask of active pipes */ u8 active_pipes; @@ -2934,8 +2937,8 @@ static bool glk_cdclk_audio_wa_needed(struct intel_display *display, const struct intel_cdclk_state *cdclk_state) { return display->platform.geminilake && - cdclk_state->active_pipes && - !is_power_of_2(cdclk_state->active_pipes); + cdclk_state->enabled_pipes && + !is_power_of_2(cdclk_state->enabled_pipes); } static int intel_compute_min_cdclk(struct intel_atomic_state *state) @@ -3253,7 +3256,8 @@ static int intel_cdclk_modeset_checks(struct intel_atomic_state *state, struct intel_cdclk_state *new_cdclk_state; int ret; - if (!intel_any_crtc_active_changed(state)) + if (!intel_any_crtc_enable_changed(state) && + !intel_any_crtc_active_changed(state)) return 0; new_cdclk_state = intel_atomic_get_cdclk_state(state); @@ -3262,6 +3266,9 @@ static int intel_cdclk_modeset_checks(struct intel_atomic_state *state, old_cdclk_state = intel_atomic_get_old_cdclk_state(state); + new_cdclk_state->enabled_pipes = + intel_calc_enabled_pipes(state, old_cdclk_state->enabled_pipes); + new_cdclk_state->active_pipes = intel_calc_active_pipes(state, old_cdclk_state->active_pipes); @@ -3496,6 +3503,7 @@ void intel_cdclk_update_hw_state(struct intel_display *display) to_intel_cdclk_state(display->cdclk.obj.state); struct intel_crtc *crtc; + cdclk_state->enabled_pipes = 0; cdclk_state->active_pipes = 0; for_each_intel_crtc(display->drm, crtc) { @@ -3503,6 +3511,8 @@ void intel_cdclk_update_hw_state(struct intel_display *display) to_intel_crtc_state(crtc->base.state); enum pipe pipe = crtc->pipe; + if (crtc_state->hw.enable) + cdclk_state->enabled_pipes |= BIT(pipe); if (crtc_state->hw.active) cdclk_state->active_pipes |= BIT(pipe); |