diff options
| author | Rob Clark <robin.clark@oss.qualcomm.com> | 2026-01-09 07:37:28 -0800 |
|---|---|---|
| committer | Rob Clark <robin.clark@oss.qualcomm.com> | 2026-01-15 14:06:12 -0800 |
| commit | 56cd8adff8cbe82a13a1db998f1353d68ed84305 (patch) | |
| tree | be034f0b8c9da39cc7a335277a70a9bf4aa33d97 /drivers/gpu/drm | |
| parent | dcbd2f8280eea2c965453ed8c3c69d6f121e950b (diff) | |
drm/msm: Fix x2-85 TPL1_DBG_ECO_CNTL1
We actually need to set b26, just claiming to do so is not enough :-)
Fixes: 01ff3bf27215 ("drm/msm/a8xx: Add support for Adreno X2-85 GPU")
Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Patchwork: https://patchwork.freedesktop.org/patch/697778/
Message-ID: <20260109153730.130462-2-robin.clark@oss.qualcomm.com>
Diffstat (limited to 'drivers/gpu/drm')
| -rw-r--r-- | drivers/gpu/drm/msm/adreno/a6xx_catalog.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_catalog.c b/drivers/gpu/drm/msm/adreno/a6xx_catalog.c index 4c042133261c..550a53a7865e 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_catalog.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_catalog.c @@ -1689,7 +1689,7 @@ static const struct adreno_reglist_pipe x285_nonctxt_regs[] = { { REG_A7XX_SP_READ_SEL, 0x0001ff00, BIT(PIPE_NONE) }, { REG_A6XX_TPL1_DBG_ECO_CNTL, 0x10000000, BIT(PIPE_NONE) }, /* BIT(26): Disable final clamp for bicubic filtering */ - { REG_A6XX_TPL1_DBG_ECO_CNTL1, 0x00000720, BIT(PIPE_NONE) }, + { REG_A6XX_TPL1_DBG_ECO_CNTL1, 0x04000720, BIT(PIPE_NONE) }, { REG_A6XX_UCHE_MODE_CNTL, 0x80080000, BIT(PIPE_NONE) }, { REG_A8XX_UCHE_CCHE_MODE_CNTL, 0x00001000, BIT(PIPE_NONE) }, { REG_A8XX_UCHE_CCHE_CACHE_WAYS, 0x00000800, BIT(PIPE_NONE) }, |