summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm
diff options
context:
space:
mode:
authorGaghik Khachatrian <gaghik.khachatrian@amd.com>2026-04-29 20:05:29 -0400
committerAlex Deucher <alexander.deucher@amd.com>2026-05-11 16:10:48 -0400
commita349b97b88e26a88171b8672cee744cac2cff5ae (patch)
tree80bceee8cf9082fc1f937d8c7795d768effa3a15 /drivers/gpu/drm
parent293dd2182e64331727f989a323fb40227f07bcbf (diff)
drm/amd/display: always-true lower-bound assert
[Why] A recent type change made the lower-bound part of the OTG instance assert redundant, which can trigger static-analysis noise and distract from actionable diagnostics. [How] Kept the meaningful upper-bound range validation required for safe narrowing to uint8_t. Removed the redundant non-negative portion of the assert so the check matches current type semantics. Revalidated with the latest debug build log: no warnings and no build-failure markers. Reviewed-by: Aric Cyr <aric.cyr@amd.com> Signed-off-by: Gaghik Khachatrian <gaghik.khachatrian@amd.com> Signed-off-by: James Lin <pinglei.lin@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm')
-rw-r--r--drivers/gpu/drm/amd/display/dc/dml2_0/dml2_utils.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dml2_0/dml2_utils.c b/drivers/gpu/drm/amd/display/dc/dml2_0/dml2_utils.c
index 1bc81e26a11f..5ed14f694fb0 100644
--- a/drivers/gpu/drm/amd/display/dc/dml2_0/dml2_utils.c
+++ b/drivers/gpu/drm/amd/display/dc/dml2_0/dml2_utils.c
@@ -255,7 +255,7 @@ static void populate_pipe_ctx_dlg_params_from_dml(struct pipe_ctx *pipe_ctx, str
pipe_ctx->pipe_dlg_param.vupdate_width = dml_get_vupdate_width(mode_lib, pipe_idx);
pipe_ctx->pipe_dlg_param.vready_offset = dml_get_vready_offset(mode_lib, pipe_idx);
- ASSERT(pipe_ctx->stream_res.tg->inst >= 0 && pipe_ctx->stream_res.tg->inst <= 0xFF);
+ ASSERT(pipe_ctx->stream_res.tg->inst <= 0xFF);
pipe_ctx->pipe_dlg_param.otg_inst = (unsigned char)pipe_ctx->stream_res.tg->inst;
pipe_ctx->pipe_dlg_param.hactive = hactive;