diff options
| author | Lijo Lazar <lijo.lazar@amd.com> | 2026-01-08 09:54:59 +0530 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2026-01-10 14:08:20 -0500 |
| commit | 34199fde4a8604d9d3ad2d939c5eed530460cc79 (patch) | |
| tree | be40bad2539618a3c922f686fe61f3f7c5d220d6 /drivers/gpu | |
| parent | 0d81c3982d32e4572fc91d5b8aca9e1a808a1820 (diff) | |
drm/amd/pm: Add message control for SMUv15
Initialize smu message control in SMUv15 SOCs.
Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Asad Kamal <asad.kamal@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu')
| -rw-r--r-- | drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0_0_ppt.c | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0_0_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0_0_ppt.c index 05d4e8d293ea..bbde9ade02ac 100644 --- a/drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0_0_ppt.c +++ b/drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0_0_ppt.c @@ -1342,6 +1342,22 @@ static void smu_v15_0_0_set_smu_mailbox_registers(struct smu_context *smu) smu->resp_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_31); } +static void smu_v15_0_0_init_msg_ctl(struct smu_context *smu) +{ + struct amdgpu_device *adev = smu->adev; + struct smu_msg_ctl *ctl = &smu->msg_ctl; + + ctl->smu = smu; + mutex_init(&ctl->lock); + ctl->config.msg_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_30); + ctl->config.resp_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_31); + ctl->config.arg_regs[0] = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_32); + ctl->config.num_arg_regs = 1; + ctl->ops = &smu_msg_v1_ops; + ctl->default_timeout = adev->usec_timeout * 20; + ctl->message_map = smu_v15_0_0_message_map; +} + void smu_v15_0_0_set_ppt_funcs(struct smu_context *smu) { @@ -1352,4 +1368,5 @@ void smu_v15_0_0_set_ppt_funcs(struct smu_context *smu) smu->is_apu = true; smu_v15_0_0_set_smu_mailbox_registers(smu); + smu_v15_0_0_init_msg_ctl(smu); } |