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authorJoshua Aberback <joshua.aberback@amd.com>2026-09-23 13:06:07 -0400
committerAlex Deucher <alexander.deucher@amd.com>2026-10-07 12:06:29 -0400
commit3b77aacb15e0e8348f1e702cb930cf0a2b703c15 (patch)
tree3ab86ef1c3ce8b20f5116311a036a5c71b472546 /drivers/gpu
parent0f87a995ce7e362540af3dffdc94938c6afb028f (diff)
drm/amd/display: Revert "avoid to write signal specific for tmds"
This reverts commit 93179870ae52d1663080655fb8f0170a82cf9951. The change regressed HDMI output on the TMDS-to-FRL switch. Reviewed-by: Martin Leung <martin.leung@amd.com> Signed-off-by: Joshua Aberback <joshua.aberback@amd.com> Signed-off-by: Roman Li <roman.li@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/amd/display/dc/link/link_dpms.c2
-rw-r--r--drivers/gpu/drm/amd/display/dc/link/protocols/link_ddc.c8
-rw-r--r--drivers/gpu/drm/amd/display/dc/link/protocols/link_ddc.h1
3 files changed, 3 insertions, 8 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/link/link_dpms.c b/drivers/gpu/drm/amd/display/dc/link/link_dpms.c
index ec503d3541c9..0d3b65d40807 100644
--- a/drivers/gpu/drm/amd/display/dc/link/link_dpms.c
+++ b/drivers/gpu/drm/amd/display/dc/link/link_dpms.c
@@ -1909,7 +1909,6 @@ static void enable_link_hdmi(struct pipe_ctx *pipe_ctx)
write_scdc_data(
stream->link->ddc,
stream->phy_pix_clk,
- dc_is_hdmi_frl_signal(pipe_ctx->stream->signal),
(stream->timing.flags.LTE_340MCSC_SCRAMBLE != 0));
if (dc->debug.enable_hdmi_idcc) {
@@ -2450,7 +2449,6 @@ enum dc_status link_set_dpms_off(struct pipe_ctx *pipe_ctx)
write_scdc_data(
link->ddc,
165000,//vbios only handles 165Mhz.
- dc_is_hdmi_frl_signal(stream->signal),
false);
if (masked_chip_caps == AMD_EXT_DISPLAY_PATH_CAPS__HDMI20_TISN65DP159RSBT) {
/* DP159, Retimer settings */
diff --git a/drivers/gpu/drm/amd/display/dc/link/protocols/link_ddc.c b/drivers/gpu/drm/amd/display/dc/link/protocols/link_ddc.c
index 3fbfc6e2594b..db798656c8a8 100644
--- a/drivers/gpu/drm/amd/display/dc/link/protocols/link_ddc.c
+++ b/drivers/gpu/drm/amd/display/dc/link/protocols/link_ddc.c
@@ -570,7 +570,6 @@ struct ddc *get_ddc_pin(struct ddc_service *ddc_service)
void write_scdc_data(struct ddc_service *ddc_service,
uint32_t pix_clk,
- bool is_frl,
bool lte_340_scramble)
{
bool over_340_mhz = pix_clk > 340000 ? 1 : 0;
@@ -587,10 +586,9 @@ void write_scdc_data(struct ddc_service *ddc_service,
(ddc_service->link->local_sink->edid_caps.panel_patch.skip_scdc_overwrite ||
!ddc_service->link->local_sink->edid_caps.scdc_present))
return;
- if (is_frl) {
- hdmi_frl_LTS_clear_Link_Setting(ddc_service);
- hdmi_frl_LTS_clear_Update_flag(ddc_service);
- }
+ hdmi_frl_LTS_clear_Link_Setting(ddc_service);
+ hdmi_frl_LTS_clear_Update_flag(ddc_service);
+
link_query_ddc_data(ddc_service, slave_address, &offset,
sizeof(offset), &sink_version, sizeof(sink_version));
if (sink_version == 1) {
diff --git a/drivers/gpu/drm/amd/display/dc/link/protocols/link_ddc.h b/drivers/gpu/drm/amd/display/dc/link/protocols/link_ddc.h
index 200823954fc6..fdd8a3dce97f 100644
--- a/drivers/gpu/drm/amd/display/dc/link/protocols/link_ddc.h
+++ b/drivers/gpu/drm/amd/display/dc/link/protocols/link_ddc.h
@@ -91,7 +91,6 @@ uint32_t link_get_fixed_vs_pe_retimer_write_address(struct dc_link *link);
void write_scdc_data(
struct ddc_service *ddc_service,
uint32_t pix_clk,
- bool is_frl,
bool lte_340_scramble);
void read_scdc_data(