diff options
| author | Linlin Yang <yanglinlin@kylinos.cn> | 2026-08-27 09:08:02 +0800 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2026-09-02 14:59:29 -0400 |
| commit | 4264e4d8ccbb4699179aec7ff83d715725c7ca85 (patch) | |
| tree | 9312125b1df4a1741ebc1217d00056a001c88adc /drivers/gpu | |
| parent | f568cf5c2d45aebcd2e9fc0df4a1f488c3c84258 (diff) | |
drm/amd/display: fix misspelling of "overridden"
Fix misspelling of "overridden" (missing a 'd') in comments.
No functional change.
Signed-off-by: Linlin Yang <yanglinlin@kylinos.cn>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu')
4 files changed, 5 insertions, 5 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c index 33b5136f7ce3..75bdad22bf69 100644 --- a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c @@ -1805,7 +1805,7 @@ static void DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerforman v->DISPCLKWithRamping = 0; v->DISPCLKWithoutRamping = 0; v->GlobalDPPCLK = 0.0; - /* DAL custom code: need to update ReturnBW in case min dcfclk is overriden */ + /* DAL custom code: need to update ReturnBW in case min dcfclk is overridden */ v->IdealSDPPortBandwidthPerState[v->VoltageLevel][v->maxMpcComb] = dml_min3( v->ReturnBusWidth * v->DCFCLK, v->DRAMSpeedPerState[v->VoltageLevel] * v->NumberOfChannels * v->DRAMChannelWidth, diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c b/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c index 8064c4b3fd25..3f62ea493787 100644 --- a/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c @@ -2045,7 +2045,7 @@ static void DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerforman v->DISPCLKWithRamping = 0; v->DISPCLKWithoutRamping = 0; v->GlobalDPPCLK = 0.0; - /* DAL custom code: need to update ReturnBW in case min dcfclk is overriden */ + /* DAL custom code: need to update ReturnBW in case min dcfclk is overridden */ { double IdealFabricAndSDPPortBandwidthPerState = dml_min( v->ReturnBusWidth * v->DCFCLKState[v->VoltageLevel][v->maxMpcComb], diff --git a/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c b/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c index e3527b14686b..c5ced2129bcf 100644 --- a/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c +++ b/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c @@ -108,7 +108,7 @@ enum dp_panel_mode dp_get_panel_mode(struct dc_link *link) /* alternate scrambler reset is required for Travis * for the case when external chip does not * provide sink device id, alternate scrambler - * scheme will be overriden later by querying + * scheme will be overridden later by querying * Encoder features */ if (strncmp( @@ -124,7 +124,7 @@ enum dp_panel_mode dp_get_panel_mode(struct dc_link *link) /* alternate scrambler reset is required for NUTMEG * for the case when external chip does not provide * sink device id, alternate scrambler scheme will - * be overriden later by querying Encoder feature + * be overridden later by querying Encoder feature */ if (strncmp(link->dpcd_caps.branch_dev_name, DP_VGA_LVDS_CONVERTER_ID_3, diff --git a/drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c b/drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c index 204375f1eff8..587d26c742cd 100644 --- a/drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c +++ b/drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c @@ -584,7 +584,7 @@ static bool dmub_srv_hw_setup(struct dmub_srv *dmub, enum dmub_asic asic) return false; } - /* set default inbox type if not overriden */ + /* set default inbox type if not overridden */ if (dmub->inbox_type == DMUB_CMD_INTERFACE_DEFAULT) { if (default_inbox_type != DMUB_CMD_INTERFACE_DEFAULT) { /* use default inbox type as specified by DCN rev */ |