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authorMitul Golani <mitulkumar.ajitkumar.golani@intel.com>2025-12-23 16:15:39 +0530
committerAnkit Nautiyal <ankit.k.nautiyal@intel.com>2025-12-30 10:02:21 +0530
commit5786499a42e6baaf27f28b64d3e55fb6b289141d (patch)
treea75a761c8838cf41a278e572038f8318f8d4f50f /drivers/gpu
parent192bc98c6fcf8c602ceaf712dc0cd616ebd73f9d (diff)
drm/i915/display: Add function to configure event for dc balance
Configure pipe dmc event for dc balance enable/disable. --v2: - Keeping function and removing unnecessary comments. (Jani, Nikula) Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com> Reviewed-by: Uma Shankar <uma.shankar@intel.com> Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Link: https://patch.msgid.link/20251223104542.2688548-18-mitulkumar.ajitkumar.golani@intel.com
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/i915/display/intel_dmc.c8
-rw-r--r--drivers/gpu/drm/i915/display/intel_dmc.h2
-rw-r--r--drivers/gpu/drm/i915/display/intel_vrr.c2
3 files changed, 12 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c
index e076ba7e0f28..1182bc9a2e6d 100644
--- a/drivers/gpu/drm/i915/display/intel_dmc.c
+++ b/drivers/gpu/drm/i915/display/intel_dmc.c
@@ -859,6 +859,14 @@ static void dmc_configure_event(struct intel_display *display,
dmc_id, num_handlers, event_id);
}
+void intel_dmc_configure_dc_balance_event(struct intel_display *display,
+ enum pipe pipe, bool enable)
+{
+ enum intel_dmc_id dmc_id = PIPE_TO_DMC_ID(pipe);
+
+ dmc_configure_event(display, dmc_id, PIPEDMC_EVENT_ADAPTIVE_DCB_TRIGGER, enable);
+}
+
/**
* intel_dmc_block_pkgc() - block PKG C-state
* @display: display instance
diff --git a/drivers/gpu/drm/i915/display/intel_dmc.h b/drivers/gpu/drm/i915/display/intel_dmc.h
index 9c6a42fc820e..3d8a9a593319 100644
--- a/drivers/gpu/drm/i915/display/intel_dmc.h
+++ b/drivers/gpu/drm/i915/display/intel_dmc.h
@@ -25,6 +25,8 @@ void intel_dmc_enable_pipe(const struct intel_crtc_state *crtc_state);
void intel_dmc_disable_pipe(const struct intel_crtc_state *crtc_state);
void intel_dmc_block_pkgc(struct intel_display *display, enum pipe pipe,
bool block);
+void intel_dmc_configure_dc_balance_event(struct intel_display *display,
+ enum pipe pipe, bool enable);
void intel_dmc_start_pkgc_exit_at_start_of_undelayed_vblank(struct intel_display *display,
enum pipe pipe, bool enable);
void intel_dmc_fini(struct intel_display *display);
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
index ac612cf08d98..1522ec3a98b8 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -823,6 +823,7 @@ intel_vrr_enable_dc_balancing(const struct intel_crtc_state *crtc_state)
crtc_state->vrr.dc_balance.slope);
intel_de_write(display, PIPEDMC_DCB_VBLANK(pipe),
crtc_state->vrr.dc_balance.vblank_target);
+ intel_dmc_configure_dc_balance_event(display, pipe, true);
intel_de_write(display, TRANS_ADAPTIVE_SYNC_DCB_CTL(cpu_transcoder),
ADAPTIVE_SYNC_COUNTER_EN);
intel_pipedmc_dcb_enable(NULL, crtc);
@@ -840,6 +841,7 @@ intel_vrr_disable_dc_balancing(const struct intel_crtc_state *old_crtc_state)
return;
intel_pipedmc_dcb_disable(NULL, crtc);
+ intel_dmc_configure_dc_balance_event(display, pipe, false);
intel_de_write(display, TRANS_ADAPTIVE_SYNC_DCB_CTL(cpu_transcoder), 0);
intel_de_write(display, PIPEDMC_DCB_VMIN(pipe), 0);
intel_de_write(display, PIPEDMC_DCB_VMAX(pipe), 0);