diff options
| author | Alex Hung <alex.hung@amd.com> | 2026-05-15 13:28:05 -0600 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2026-06-03 13:41:50 -0400 |
| commit | 64aa07084a0d44541d022ac1dd2d8c03ba5b222c (patch) | |
| tree | 6bf042a9cdb6ce811a0b7ee32079cf4d41add5ba /drivers/gpu | |
| parent | f84c48048b491941af8caaa65d4260123cab7257 (diff) | |
drm/amd/display: Add KUnit tests for dm_ism_dispatch_next_event
[Why & How]
Add 6 KUnit test cases exercising the new helper:
- hyst_wait_no_delay: HYSTERESIS_WAITING + delay_ns==0
returns IMMEDIATE (covers null stream / no hysteresis config).
- hyst_wait_with_delay: HYSTERESIS_WAITING + delay_ns>0
returns DM_ISM_NUM_EVENTS (timer scheduled, no immediate event).
- opt_idle_no_sso_delay: OPTIMIZED_IDLE + sso_delay_ns==0
returns IMMEDIATE (skip SSO, transition immediately).
- opt_idle_with_sso_delay: OPTIMIZED_IDLE + sso_delay_ns>0
returns DM_ISM_NUM_EVENTS (SSO timer scheduled).
- timer_aborted: TIMER_ABORTED always returns IMMEDIATE
regardless of delay values.
- no_action_state: all other states return DM_ISM_NUM_EVENTS.
Assisted-by: Copilot:Claude-Sonnet-4.6
Reviewed-by: Ray Wu <ray.wu@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Ray Wu <ray.wu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu')
| -rw-r--r-- | drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_ism_test.c | 87 |
1 files changed, 87 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_ism_test.c b/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_ism_test.c index c333dab40959..f3b3f77aafd5 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_ism_test.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_ism_test.c @@ -781,6 +781,86 @@ static void dm_test_ism_trigger_event_invalid_transition(struct kunit *test) (int)DM_ISM_STATE_FULL_POWER_RUNNING); } +/* ===== Tests for dm_ism_dispatch_next_event ===== */ + +/** + * dm_test_dispatch_next_event_hyst_wait_no_delay - zero delay_ns: IMMEDIATE in HYSTERESIS_WAITING + * @test: KUnit test context + */ +static void dm_test_dispatch_next_event_hyst_wait_no_delay(struct kunit *test) +{ + enum amdgpu_dm_ism_event result; + + result = dm_ism_dispatch_next_event(DM_ISM_STATE_HYSTERESIS_WAITING, + 0, 0); + KUNIT_EXPECT_EQ(test, (int)result, (int)DM_ISM_EVENT_IMMEDIATE); +} + +/** + * dm_test_dispatch_next_event_hyst_wait_with_delay - delay_ns > 0, no IMMEDIATE event returned + * @test: KUnit test context + */ +static void dm_test_dispatch_next_event_hyst_wait_with_delay(struct kunit *test) +{ + enum amdgpu_dm_ism_event result; + + result = dm_ism_dispatch_next_event(DM_ISM_STATE_HYSTERESIS_WAITING, + 1000000, 0); + KUNIT_EXPECT_EQ(test, (int)result, (int)DM_ISM_NUM_EVENTS); +} + +/** + * dm_test_dispatch_next_event_opt_idle_no_sso_delay - sso_delay_ns == 0 triggers IMMEDIATE event + * @test: KUnit test context + */ +static void dm_test_dispatch_next_event_opt_idle_no_sso_delay(struct kunit *test) +{ + enum amdgpu_dm_ism_event result; + + result = dm_ism_dispatch_next_event(DM_ISM_STATE_OPTIMIZED_IDLE, + 0, 0); + KUNIT_EXPECT_EQ(test, (int)result, (int)DM_ISM_EVENT_IMMEDIATE); +} + +/** + * dm_test_dispatch_next_event_opt_idle_with_sso_delay - sso_delay_ns > 0, SSO timer, no IMMEDIATE + * @test: KUnit test context + */ +static void dm_test_dispatch_next_event_opt_idle_with_sso_delay(struct kunit *test) +{ + enum amdgpu_dm_ism_event result; + + result = dm_ism_dispatch_next_event(DM_ISM_STATE_OPTIMIZED_IDLE, + 0, 1000000); + KUNIT_EXPECT_EQ(test, (int)result, (int)DM_ISM_NUM_EVENTS); +} + +/** + * dm_test_dispatch_next_event_timer_aborted - TIMER_ABORTED always returns IMMEDIATE + * @test: KUnit test context + */ +static void dm_test_dispatch_next_event_timer_aborted(struct kunit *test) +{ + enum amdgpu_dm_ism_event result; + + result = dm_ism_dispatch_next_event(DM_ISM_STATE_TIMER_ABORTED, + 0, 0); + KUNIT_EXPECT_EQ(test, (int)result, (int)DM_ISM_EVENT_IMMEDIATE); +} + +/** + * dm_test_dispatch_next_event_no_action_state - other states return DM_ISM_NUM_EVENTS + * @test: KUnit test context + */ +static void dm_test_dispatch_next_event_no_action_state(struct kunit *test) +{ + enum amdgpu_dm_ism_event result; + + result = dm_ism_dispatch_next_event(DM_ISM_STATE_FULL_POWER_RUNNING, + 0, 0); + KUNIT_EXPECT_EQ(test, (int)result, (int)DM_ISM_NUM_EVENTS); +} + static struct kunit_case dm_ism_test_cases[] = { /* dm_ism_next_state — FULL_POWER_RUNNING */ KUNIT_CASE(dm_test_ism_next_state_running_enter_idle), @@ -836,6 +916,13 @@ static struct kunit_case dm_ism_test_cases[] = { /* dm_ism_trigger_event */ KUNIT_CASE(dm_test_ism_trigger_event_valid_transition), KUNIT_CASE(dm_test_ism_trigger_event_invalid_transition), + /* dm_ism_dispatch_next_event */ + KUNIT_CASE(dm_test_dispatch_next_event_hyst_wait_no_delay), + KUNIT_CASE(dm_test_dispatch_next_event_hyst_wait_with_delay), + KUNIT_CASE(dm_test_dispatch_next_event_opt_idle_no_sso_delay), + KUNIT_CASE(dm_test_dispatch_next_event_opt_idle_with_sso_delay), + KUNIT_CASE(dm_test_dispatch_next_event_timer_aborted), + KUNIT_CASE(dm_test_dispatch_next_event_no_action_state), {} }; |
