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| author | Olof Johansson <olof@lixom.net> | 2014-07-22 09:17:18 -0700 |
|---|---|---|
| committer | Olof Johansson <olof@lixom.net> | 2014-07-22 09:17:18 -0700 |
| commit | e9a86d96be0dff611156ea89fbb6eb91478bddab (patch) | |
| tree | ad38c21c76e1c275264cb20482a7f2bdd54618ba /drivers/irqchip/irq-gic.c | |
| parent | fc3791f3a95df5b76ecbda6952c13ff67251fd10 (diff) | |
| parent | ad8adbf2c7d6269d0100f7f460f4837ece060977 (diff) | |
Merge tag 'sti-defconfig-for-v3.17-1' of git://git.stlinux.com/devel/kernel/linux-sti into next/defconfig
Merge "ARM: STi: defconfig changes for v3.17" from Maxime Coquelin:
STi defconfig updates for v3.17
- Enable ST's Thermal controller driver
- Enable ST's Keyscan driver
- Enable ST's MiPHY365 Phy driver for STiH416 SATA & PCIe
- Enable ST's AHCI driver.
* tag 'sti-defconfig-for-v3.17-1' of git://git.stlinux.com/devel/kernel/linux-sti:
ARM: multi_v7_defconfig: Enable MiPHY365x - ST's Generic (SATA & PCIe) PHY
ARM: multi_v7_defconfig: Enable ST's (S)ATA driver
ARM: multi_v7_defconfig: add ST Keyscan driver
ARM: update multi_v7_defconfig for STI
ARM: multi_v7_defconfig: Configure in ST's Thermal Controller
+ Linux 3.16-rc6
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'drivers/irqchip/irq-gic.c')
| -rw-r--r-- | drivers/irqchip/irq-gic.c | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c index 7e11c9d6ae8c..7c131cf7cc13 100644 --- a/drivers/irqchip/irq-gic.c +++ b/drivers/irqchip/irq-gic.c @@ -42,6 +42,7 @@ #include <linux/irqchip/chained_irq.h> #include <linux/irqchip/arm-gic.h> +#include <asm/cputype.h> #include <asm/irq.h> #include <asm/exception.h> #include <asm/smp_plat.h> @@ -954,7 +955,9 @@ void __init gic_init_bases(unsigned int gic_nr, int irq_start, } for_each_possible_cpu(cpu) { - unsigned long offset = percpu_offset * cpu_logical_map(cpu); + u32 mpidr = cpu_logical_map(cpu); + u32 core_id = MPIDR_AFFINITY_LEVEL(mpidr, 0); + unsigned long offset = percpu_offset * core_id; *per_cpu_ptr(gic->dist_base.percpu_base, cpu) = dist_base + offset; *per_cpu_ptr(gic->cpu_base.percpu_base, cpu) = cpu_base + offset; } @@ -1071,8 +1074,10 @@ gic_of_init(struct device_node *node, struct device_node *parent) gic_cnt++; return 0; } +IRQCHIP_DECLARE(gic_400, "arm,gic-400", gic_of_init); IRQCHIP_DECLARE(cortex_a15_gic, "arm,cortex-a15-gic", gic_of_init); IRQCHIP_DECLARE(cortex_a9_gic, "arm,cortex-a9-gic", gic_of_init); +IRQCHIP_DECLARE(cortex_a7_gic, "arm,cortex-a7-gic", gic_of_init); IRQCHIP_DECLARE(msm_8660_qgic, "qcom,msm-8660-qgic", gic_of_init); IRQCHIP_DECLARE(msm_qgic2, "qcom,msm-qgic2", gic_of_init); |