diff options
| author | Tudor Ambarus <tudor.ambarus@microchip.com> | 2021-01-21 13:05:46 +0200 |
|---|---|---|
| committer | Tudor Ambarus <tudor.ambarus@microchip.com> | 2021-02-05 15:24:59 +0200 |
| commit | 75386810d3a61f4bb9e180774291454f7235b8b3 (patch) | |
| tree | 66e21332f91193ea23426d9c87e857930b3c68e7 /drivers/mtd/spi-nor/core.h | |
| parent | a7a5acba0e06b8f9923faa1a726f0ac1380b719a (diff) | |
mtd: spi-nor: sst: Add support for Global Unlock on sst26vf
Even if sst26vf shares the SPINOR_OP_GBULK opcode with
Macronix (ex. MX25U12835F) and Winbound (ex. W25Q128FV),
it has its own Individual Block Protection scheme, which
is also capable to read-lock individual parameter blocks.
Thus the sst26vf's Individual Block Protection scheme will
reside in the sst.c manufacturer driver.
Add support to unlock the entire flash memory. The device
is write-protected by default after a power-on reset cycle
(volatile software protection), in order to avoid inadvertent
writes during power-up. Could do an erase, write, read back,
and compare when MTD_SPI_NOR_SWP_DISABLE_ON_VOLATILE=y.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Michael Walle <michael@walle.cc>
Link: https://lore.kernel.org/r/20210121110546.382633-2-tudor.ambarus@microchip.com
Diffstat (limited to 'drivers/mtd/spi-nor/core.h')
| -rw-r--r-- | drivers/mtd/spi-nor/core.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h index eb26796db026..4a3f7f150b5d 100644 --- a/drivers/mtd/spi-nor/core.h +++ b/drivers/mtd/spi-nor/core.h @@ -441,6 +441,7 @@ int spi_nor_sr1_bit6_quad_enable(struct spi_nor *nor); int spi_nor_sr2_bit1_quad_enable(struct spi_nor *nor); int spi_nor_sr2_bit7_quad_enable(struct spi_nor *nor); int spi_nor_read_sr(struct spi_nor *nor, u8 *sr); +int spi_nor_read_cr(struct spi_nor *nor, u8 *cr); int spi_nor_write_sr(struct spi_nor *nor, const u8 *sr, size_t len); int spi_nor_write_sr_and_check(struct spi_nor *nor, u8 sr1); |