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authorLinus Torvalds <torvalds@linux-foundation.org>2013-11-12 15:40:03 +0900
committerLinus Torvalds <torvalds@linux-foundation.org>2013-11-12 15:40:03 +0900
commit8a5dc585d50015af9c079ae2d182dc4c1cd22914 (patch)
tree7544d20587e589bf20c526a5f83205e113cc3e58 /drivers/pinctrl/pinctrl-imx1.h
parenteeab517b68beb9e044e869bee18e3bdfa60e5aca (diff)
parent9da8312048edcf246ac1d7ab6aa0293f252de559 (diff)
Merge tag 'pinctrl-for-v3.13-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij: "Main pin control pull request for the v3.13 cycle. The changes hitting arch/blackfin are ACKed by the Blackfin maintainer, and the device tree bindings are ACKed to the extent possible by someone from the device tree maintainers group. - Blackfin ADI pin control driver, we move yet another architecture under this subsystem umbrella. - Incremental updates to the Renesas Super-H PFC pin control driver. New subdriver for the r8a7791 SoC. - Non-linear GPIO ranges from the gpiolib side of things, this enabled simplified device tree bindings by referring entire groups of pins on some pin controller to act as back-end for a certain GPIO-chip driver. - Add the Abilis TB10x pin control driver used on the ARC architecture. Also the corresponding GPIO driver is merged through this tree, so the ARC has full support for pins and GPIOs after this. - Subdrivers for Freescale i.MX1, i.MX27 and i.MX50 pin controller instances. The i.MX1 and i.MX27 is an entirely new family (silicon) of controllers whereas i.MX50 is a variant of the previous supported controller. - Then the usual slew of fixes, cleanups and incremental updates" The ARC DT changes are apparently still pending, that hopefully gets sorted out in a timely manner. * tag 'pinctrl-for-v3.13-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (48 commits) pinctrl: imx50: add pinctrl support code for the IMX50 SoC pinctrl: at91: copy define to driver pinctrl: remove minor dead code pinctrl: imx: fix using pin->input_val wrongly pinctrl: imx1: fix return value check in imx1_pinctrl_core_probe() gpio: tb10x: fix return value check in tb10x_gpio_probe() gpio: tb10x: use module_platform_driver to simplify the code pinctrl: imx27: imx27 pincontrol driver pinctrl: imx1 core driver pinctrl: sh-pfc: r8a7791 PFC support sh-pfc: r8a7778: Add CAN pin groups gpio: add TB10x GPIO driver pinctrl: at91: correct a few typos pinctrl: mvebu: remove redundant of_match_ptr pinctrl: tb10x: use module_platform_driver to simplify the code pinctrl: tb10x: fix the error handling in tb10x_pinctrl_probe() pinctrl: add documentation for pinctrl_get_group_pins() pinctrl: rockchip: emulate both edge triggered interrupts pinctrl: rockchip: add rk3188 specifics pinctrl: rockchip: remove redundant check ...
Diffstat (limited to 'drivers/pinctrl/pinctrl-imx1.h')
-rw-r--r--drivers/pinctrl/pinctrl-imx1.h73
1 files changed, 73 insertions, 0 deletions
diff --git a/drivers/pinctrl/pinctrl-imx1.h b/drivers/pinctrl/pinctrl-imx1.h
new file mode 100644
index 000000000000..692a54c15cda
--- /dev/null
+++ b/drivers/pinctrl/pinctrl-imx1.h
@@ -0,0 +1,73 @@
+/*
+ * IMX pinmux core definitions
+ *
+ * Copyright (C) 2012 Freescale Semiconductor, Inc.
+ * Copyright (C) 2012 Linaro Ltd.
+ *
+ * Author: Dong Aisheng <dong.aisheng@linaro.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef __DRIVERS_PINCTRL_IMX1_H
+#define __DRIVERS_PINCTRL_IMX1_H
+
+struct platform_device;
+
+/**
+ * struct imx1_pin - describes an IMX1/21/27 pin.
+ * @pin_id: ID of the described pin.
+ * @mux_id: ID of the mux setup.
+ * @config: Configuration of the pin (currently only pullup-enable).
+ */
+struct imx1_pin {
+ unsigned int pin_id;
+ unsigned int mux_id;
+ unsigned long config;
+};
+
+/**
+ * struct imx1_pin_group - describes an IMX pin group
+ * @name: the name of this specific pin group
+ * @pins: an array of imx1_pin structs used in this group
+ * @npins: the number of pins in this group array, i.e. the number of
+ * elements in .pins so we can iterate over that array
+ */
+struct imx1_pin_group {
+ const char *name;
+ unsigned int *pin_ids;
+ struct imx1_pin *pins;
+ unsigned npins;
+};
+
+/**
+ * struct imx1_pmx_func - describes IMX pinmux functions
+ * @name: the name of this specific function
+ * @groups: corresponding pin groups
+ * @num_groups: the number of groups
+ */
+struct imx1_pmx_func {
+ const char *name;
+ const char **groups;
+ unsigned num_groups;
+};
+
+struct imx1_pinctrl_soc_info {
+ struct device *dev;
+ const struct pinctrl_pin_desc *pins;
+ unsigned int npins;
+ struct imx1_pin_group *groups;
+ unsigned int ngroups;
+ struct imx1_pmx_func *functions;
+ unsigned int nfunctions;
+};
+
+#define IMX_PINCTRL_PIN(pin) PINCTRL_PIN(pin, #pin)
+
+int imx1_pinctrl_core_probe(struct platform_device *pdev,
+ struct imx1_pinctrl_soc_info *info);
+int imx1_pinctrl_core_remove(struct platform_device *pdev);
+#endif /* __DRIVERS_PINCTRL_IMX1_H */