diff options
| author | Brian Masney <bmasney@redhat.com> | 2026-01-12 17:48:10 -0500 |
|---|---|---|
| committer | Thomas Bogendoerfer <tsbogend@alpha.franken.de> | 2026-01-30 15:29:08 +0100 |
| commit | 026d70dcfe5de1543bb8edb8e50d22dc16863e6b (patch) | |
| tree | c3a30c2784835f47023ded5e568971e4d40def15 /drivers | |
| parent | 89ace0736208de07577ecc16962927930baf4e7d (diff) | |
clk: microchip: core: allow driver to be compiled with COMPILE_TEST
This driver currently only supports builds against a PIC32 target. To
avoid future breakage in the future, let's update the Kconfig and the
driver so that it can be built with CONFIG_COMPILE_TEST enabled.
Note that with the existing asm calls is not how I'd want to do this
today if this was a new driver, however I don't have access to this
hardware. To avoid any breakage, let's keep the existing behavior.
Signed-off-by: Brian Masney <bmasney@redhat.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/clk/microchip/Kconfig | 2 | ||||
| -rw-r--r-- | drivers/clk/microchip/clk-core.c | 4 |
2 files changed, 5 insertions, 1 deletions
diff --git a/drivers/clk/microchip/Kconfig b/drivers/clk/microchip/Kconfig index 1b9e43eb5497..1e56a057319d 100644 --- a/drivers/clk/microchip/Kconfig +++ b/drivers/clk/microchip/Kconfig @@ -1,7 +1,7 @@ # SPDX-License-Identifier: GPL-2.0 config COMMON_CLK_PIC32 - def_bool COMMON_CLK && MACH_PIC32 + def_bool (COMMON_CLK && MACH_PIC32) || COMPILE_TEST config MCHP_CLK_MPFS bool "Clk driver for PolarFire SoC" diff --git a/drivers/clk/microchip/clk-core.c b/drivers/clk/microchip/clk-core.c index 891bec5fe1be..ce3a24e061d1 100644 --- a/drivers/clk/microchip/clk-core.c +++ b/drivers/clk/microchip/clk-core.c @@ -75,6 +75,7 @@ /* SoC specific clock needed during SPLL clock rate switch */ static struct clk_hw *pic32_sclk_hw; +#ifdef CONFIG_MATCH_PIC32 /* add instruction pipeline delay while CPU clock is in-transition. */ #define cpu_nop5() \ do { \ @@ -84,6 +85,9 @@ do { \ __asm__ __volatile__("nop"); \ __asm__ __volatile__("nop"); \ } while (0) +#else +#define cpu_nop5() +#endif /* Perpheral bus clocks */ struct pic32_periph_clk { |