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authorChunyang Chen <chenchunyang0908@gmail.com>2026-03-05 20:43:02 +0800
committerJonathan Cameron <Jonathan.Cameron@huawei.com>2026-03-07 13:17:59 +0000
commit6f658d19a5a29a602c372e8cfe8d4a623367d211 (patch)
tree3da0c9fd4ea4deff73a4a8212df7b205cdbdd49e /drivers
parentd20bbae6e5d408a8a7c2a4344d76dd1ac557a149 (diff)
iio: adc: ti-ads1018: fix type overflow for data rate
The variable 'drate' is currently defined as u8. However, the data rate values in ads1018 can reach up to 3300 Hz, which exceeds the maximum value of 255 that a u8 can hold. Change the type of 'drate' to u32 to match the data_rate_mode_to_hz array definition and ensure the data rate is handled correctly. Fixes: bf0bba486b5b ("iio: adc: Add ti-ads1018 driver") Signed-off-by: Chunyang Chen <chenchunyang0908@gmail.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com> Reviewed-by: Kurt Borja <kuurtb@gmail.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/iio/adc/ti-ads1018.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/iio/adc/ti-ads1018.c b/drivers/iio/adc/ti-ads1018.c
index 6246b3cab71f..0780abd0d0db 100644
--- a/drivers/iio/adc/ti-ads1018.c
+++ b/drivers/iio/adc/ti-ads1018.c
@@ -249,7 +249,7 @@ static int ads1018_single_shot(struct ads1018 *ads1018,
struct iio_chan_spec const *chan, u16 *cnv)
{
u8 max_drate_mode = ads1018->chip_info->num_data_rate_mode_to_hz - 1;
- u8 drate = ads1018->chip_info->data_rate_mode_to_hz[max_drate_mode];
+ u32 drate = ads1018->chip_info->data_rate_mode_to_hz[max_drate_mode];
u8 pga_mode = ads1018->chan_data[chan->scan_index].pga_mode;
struct spi_transfer xfer[2] = {
{