diff options
| author | Linus Torvalds <torvalds@linux-foundation.org> | 2026-06-22 09:24:22 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2026-06-22 09:24:22 -0700 |
| commit | 9f333cb6b57c3f72073bf058f984b180cc00bf7b (patch) | |
| tree | fd6c48a518a23d030daa2f75f8f30329dc0c0a69 /drivers | |
| parent | 335c347686e76df9d2c7d7f61b5ea627a4c5cb4c (diff) | |
| parent | 678e9409dd78d5c080607df15c6f346c7edb03d0 (diff) | |
Merge tag 'i3c/for-7.2' of git://git.kernel.org/pub/scm/linux/kernel/git/i3c/linux
Pull i3c updates from Alexandre Belloni:
"This cycle, there was a lot of work around the mipi-i3c-hci driver
that also led to improvements of the core. We also have support for a
new SoC, the Microchip SAMA7D65. And of course, there are small fixes
for the other controller drivers.
Subsystem:
- introduce dynamic address reconciliation after DAA
- add preliminary API for hub support
- fixes for dev_nack_retry_count handling
- move hot-join support in the core instead of open coding in
different drivers
Drivers:
- mipi-i3c-hci-pci: DMA abort, recovery and related improvements,
hot-join support, Microchip SAMA7D65 support, fix possible race in
IBI handling
- dw-i3c-master: fix IBI count register selection for versalnet
- svc: interrupt handling fixes for NPCM845"
* tag 'i3c/for-7.2' of git://git.kernel.org/pub/scm/linux/kernel/git/i3c/linux: (45 commits)
i3c: mipi-i3c-hci: Use named initializers for platform_device_id's .driver_data
i3c: master: Use unsigned int for dev_nack_retry_count consistently
i3c: master: Add missing runtime PM get in dev_nack_retry_count_store()
i3c: master: Update dev_nack_retry_count under maintenance lock
i3c: master: Expose the APIs to support I3C hub
i3c: master: rename i3c_master_reattach_i3c_dev() to *_locked
i3c: mipi-i3c-hci: add microchip sama7d65 SoC compatible with the required quirk
dt-bindings: i3c: mipi-i3c-hci: add Microchip SAMA7D65 compatible
i3c: Consistently define pci_device_ids using named initializers
i3c: master: Reconcile dynamic addresses after DAA
i3c: master: Move DAA API functions after i3c_master_add_i3c_dev_locked()
i3c: master: Make i3c_master_add_i3c_dev_locked() return void
i3c: mipi-i3c-hci: Tolerate i3c_master_add_i3c_dev_locked() failures in DAA
i3c: master: Prevent reuse of dynamic address on device add failure
i3c: mipi-i3c-hci: Ignore DISEC failures when disabling IBIs
i3c: mipi-i3c-hci: Fix race in i3c_hci_addr_to_dev()
i3c: mipi-i3c-hci: Add Hot-Join support
i3c: master: Export i3c_master_enec_disec_locked()
i3c: master: Defer new-device registration out of DAA caller context
i3c: dw: Drop redundant Hot-Join cancel_work_sync() in shutdown
...
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/i3c/master.c | 504 | ||||
| -rw-r--r-- | drivers/i3c/master/dw-i3c-master.c | 40 | ||||
| -rw-r--r-- | drivers/i3c/master/dw-i3c-master.h | 3 | ||||
| -rw-r--r-- | drivers/i3c/master/i3c-master-cdns.c | 14 | ||||
| -rw-r--r-- | drivers/i3c/master/mipi-i3c-hci/cmd.h | 6 | ||||
| -rw-r--r-- | drivers/i3c/master/mipi-i3c-hci/cmd_v1.c | 4 | ||||
| -rw-r--r-- | drivers/i3c/master/mipi-i3c-hci/cmd_v2.c | 4 | ||||
| -rw-r--r-- | drivers/i3c/master/mipi-i3c-hci/core.c | 194 | ||||
| -rw-r--r-- | drivers/i3c/master/mipi-i3c-hci/dma.c | 345 | ||||
| -rw-r--r-- | drivers/i3c/master/mipi-i3c-hci/hci.h | 24 | ||||
| -rw-r--r-- | drivers/i3c/master/mipi-i3c-hci/ibi.h | 13 | ||||
| -rw-r--r-- | drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c | 22 | ||||
| -rw-r--r-- | drivers/i3c/master/mipi-i3c-hci/pio.c | 13 | ||||
| -rw-r--r-- | drivers/i3c/master/svc-i3c-master.c | 39 |
14 files changed, 927 insertions, 298 deletions
diff --git a/drivers/i3c/master.c b/drivers/i3c/master.c index 5cd4e5da2233..f1be38a640ca 100644 --- a/drivers/i3c/master.c +++ b/drivers/i3c/master.c @@ -6,7 +6,9 @@ */ #include <linux/atomic.h> +#include <linux/bitmap.h> #include <linux/bug.h> +#include <linux/delay.h> #include <linux/device.h> #include <linux/dma-mapping.h> #include <linux/err.h> @@ -174,7 +176,7 @@ static ssize_t bcr_show(struct device *dev, i3c_bus_normaluse_lock(bus); desc = dev_to_i3cdesc(dev); - ret = sprintf(buf, "0x%02x\n", desc->info.bcr); + ret = sysfs_emit(buf, "0x%02x\n", desc->info.bcr); i3c_bus_normaluse_unlock(bus); return ret; @@ -191,7 +193,7 @@ static ssize_t dcr_show(struct device *dev, i3c_bus_normaluse_lock(bus); desc = dev_to_i3cdesc(dev); - ret = sprintf(buf, "0x%02x\n", desc->info.dcr); + ret = sysfs_emit(buf, "0x%02x\n", desc->info.dcr); i3c_bus_normaluse_unlock(bus); return ret; @@ -208,7 +210,7 @@ static ssize_t pid_show(struct device *dev, i3c_bus_normaluse_lock(bus); desc = dev_to_i3cdesc(dev); - ret = sprintf(buf, "%llx\n", desc->info.pid); + ret = sysfs_emit(buf, "%llx\n", desc->info.pid); i3c_bus_normaluse_unlock(bus); return ret; @@ -225,7 +227,7 @@ static ssize_t dynamic_address_show(struct device *dev, i3c_bus_normaluse_lock(bus); desc = dev_to_i3cdesc(dev); - ret = sprintf(buf, "%02x\n", desc->info.dyn_addr); + ret = sysfs_emit(buf, "%02x\n", desc->info.dyn_addr); i3c_bus_normaluse_unlock(bus); return ret; @@ -256,7 +258,7 @@ static ssize_t hdrcap_show(struct device *dev, if (!hdrcap_strings[mode]) continue; - ret = sprintf(buf + offset, offset ? " %s" : "%s", + ret = sysfs_emit_at(buf, offset, offset ? " %s" : "%s", hdrcap_strings[mode]); if (ret < 0) goto out; @@ -264,7 +266,7 @@ static ssize_t hdrcap_show(struct device *dev, offset += ret; } - ret = sprintf(buf + offset, "\n"); + ret = sysfs_emit_at(buf, offset, "\n"); if (ret < 0) goto out; @@ -290,10 +292,10 @@ static ssize_t modalias_show(struct device *dev, ext = I3C_PID_EXTRA_INFO(devinfo.pid); if (I3C_PID_RND_LOWER_32BITS(devinfo.pid)) - return sprintf(buf, "i3c:dcr%02Xmanuf%04X", devinfo.dcr, + return sysfs_emit(buf, "i3c:dcr%02Xmanuf%04X\n", devinfo.dcr, manuf); - return sprintf(buf, "i3c:dcr%02Xmanuf%04Xpart%04Xext%04X", + return sysfs_emit(buf, "i3c:dcr%02Xmanuf%04Xpart%04Xext%04X\n", devinfo.dcr, manuf, part, ext); } static DEVICE_ATTR_RO(modalias); @@ -368,14 +370,6 @@ static void i3c_device_remove(struct device *dev) driver->remove(i3cdev); } -const struct bus_type i3c_bus_type = { - .name = "i3c", - .match = i3c_device_match, - .probe = i3c_device_probe, - .remove = i3c_device_remove, -}; -EXPORT_SYMBOL_GPL(i3c_bus_type); - static enum i3c_addr_slot_status i3c_bus_get_addr_slot_status_mask(struct i3c_bus *bus, u16 addr, u32 mask) { @@ -578,9 +572,9 @@ static ssize_t mode_show(struct device *dev, if (i3cbus->mode < 0 || i3cbus->mode >= ARRAY_SIZE(i3c_bus_mode_strings) || !i3c_bus_mode_strings[i3cbus->mode]) - ret = sprintf(buf, "unknown\n"); + ret = sysfs_emit(buf, "unknown\n"); else - ret = sprintf(buf, "%s\n", i3c_bus_mode_strings[i3cbus->mode]); + ret = sysfs_emit(buf, "%s\n", i3c_bus_mode_strings[i3cbus->mode]); i3c_bus_normaluse_unlock(i3cbus); return ret; @@ -595,7 +589,7 @@ static ssize_t current_master_show(struct device *dev, ssize_t ret; i3c_bus_normaluse_lock(i3cbus); - ret = sprintf(buf, "%d-%llx\n", i3cbus->id, + ret = sysfs_emit(buf, "%d-%llx\n", i3cbus->id, i3cbus->cur_master->info.pid); i3c_bus_normaluse_unlock(i3cbus); @@ -611,7 +605,7 @@ static ssize_t i3c_scl_frequency_show(struct device *dev, ssize_t ret; i3c_bus_normaluse_lock(i3cbus); - ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i3c); + ret = sysfs_emit(buf, "%ld\n", i3cbus->scl_rate.i3c); i3c_bus_normaluse_unlock(i3cbus); return ret; @@ -626,13 +620,21 @@ static ssize_t i2c_scl_frequency_show(struct device *dev, ssize_t ret; i3c_bus_normaluse_lock(i3cbus); - ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i2c); + ret = sysfs_emit(buf, "%ld\n", i3cbus->scl_rate.i2c); i3c_bus_normaluse_unlock(i3cbus); return ret; } static DEVICE_ATTR_RO(i2c_scl_frequency); +static void i3c_master_hj_work_fn(struct work_struct *work) +{ + struct i3c_master_controller *master = container_of(work, typeof(*master), hj_work); + + if (!master->shutting_down) + i3c_master_do_daa(master); +} + static int i3c_set_hotjoin(struct i3c_master_controller *master, bool enable) { int ret; @@ -649,9 +651,11 @@ static int i3c_set_hotjoin(struct i3c_master_controller *master, bool enable) return ret; } - i3c_bus_normaluse_lock(&master->bus); + i3c_bus_maintenance_lock(&master->bus); - if (enable) + if (master->shutting_down) + ret = -ENODEV; + else if (enable) ret = master->ops->enable_hotjoin(master); else ret = master->ops->disable_hotjoin(master); @@ -659,7 +663,7 @@ static int i3c_set_hotjoin(struct i3c_master_controller *master, bool enable) if (!ret) master->hotjoin = enable; - i3c_bus_normaluse_unlock(&master->bus); + i3c_bus_maintenance_unlock(&master->bus); if ((enable && ret) || (!enable && !ret) || master->rpm_ibi_allowed) i3c_master_rpm_put(master); @@ -711,6 +715,18 @@ int i3c_master_disable_hotjoin(struct i3c_master_controller *master) } EXPORT_SYMBOL_GPL(i3c_master_disable_hotjoin); +/** + * i3c_master_queue_hotjoin - Queue DAA processing after a Hot-Join event + * @master: I3C master object + * + * Queue the hot-join worker on the master's workqueue. + */ +void i3c_master_queue_hotjoin(struct i3c_master_controller *master) +{ + queue_work(master->wq, &master->hj_work); +} +EXPORT_SYMBOL_GPL(i3c_master_queue_hotjoin); + static ssize_t hotjoin_show(struct device *dev, struct device_attribute *da, char *buf) { struct i3c_bus *i3cbus = dev_to_i3cbus(dev); @@ -728,7 +744,14 @@ static DEVICE_ATTR_RW(hotjoin); static ssize_t dev_nack_retry_count_show(struct device *dev, struct device_attribute *attr, char *buf) { - return sysfs_emit(buf, "%u\n", dev_to_i3cmaster(dev)->dev_nack_retry_count); + struct i3c_bus *i3cbus = dev_to_i3cbus(dev); + ssize_t ret; + + i3c_bus_normaluse_lock(i3cbus); + ret = sysfs_emit(buf, "%u\n", dev_to_i3cmaster(dev)->dev_nack_retry_count); + i3c_bus_normaluse_unlock(i3cbus); + + return ret; } static ssize_t dev_nack_retry_count_store(struct device *dev, @@ -737,23 +760,26 @@ static ssize_t dev_nack_retry_count_store(struct device *dev, { struct i3c_bus *i3cbus = dev_to_i3cbus(dev); struct i3c_master_controller *master = dev_to_i3cmaster(dev); - unsigned long val; + unsigned int val; int ret; - ret = kstrtoul(buf, 0, &val); + ret = kstrtouint(buf, 0, &val); + if (ret) + return ret; + + ret = i3c_master_rpm_get(master); if (ret) return ret; i3c_bus_maintenance_lock(i3cbus); ret = master->ops->set_dev_nack_retry(master, val); + if (!ret) + master->dev_nack_retry_count = val; i3c_bus_maintenance_unlock(i3cbus); - if (ret) - return ret; - - master->dev_nack_retry_count = val; + i3c_master_rpm_put(master); - return count; + return ret ?: count; } static DEVICE_ATTR_RW(dev_nack_retry_count); @@ -818,6 +844,31 @@ static const struct device_type i3c_masterdev_type = { .groups = i3c_masterdev_groups, }; +static void i3c_master_shutdown(struct i3c_master_controller *master) +{ + i3c_bus_maintenance_lock(&master->bus); + master->shutting_down = true; + i3c_bus_maintenance_unlock(&master->bus); + + cancel_work_sync(&master->hj_work); + cancel_work_sync(&master->reg_work); +} + +static void i3c_device_shutdown(struct device *dev) +{ + if (dev->type == &i3c_masterdev_type) + i3c_master_shutdown(dev_to_i3cmaster(dev)); +} + +const struct bus_type i3c_bus_type = { + .name = "i3c", + .match = i3c_device_match, + .probe = i3c_device_probe, + .remove = i3c_device_remove, + .shutdown = i3c_device_shutdown, +}; +EXPORT_SYMBOL_GPL(i3c_bus_type); + static int i3c_bus_set_mode(struct i3c_bus *i3cbus, enum i3c_bus_mode mode, unsigned long max_i2c_scl_rate) { @@ -1082,9 +1133,29 @@ int i3c_master_entdaa_locked(struct i3c_master_controller *master) } EXPORT_SYMBOL_GPL(i3c_master_entdaa_locked); -static int i3c_master_enec_disec_locked(struct i3c_master_controller *master, - u8 addr, bool enable, u8 evts, - bool suppress_m2) +/** + * i3c_master_enec_disec_locked() - send an ENEC or DISEC CCC command + * @master: master used to send frames on the bus + * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR + * @enable: true to send ENEC, false to send DISEC + * @evts: events to enable or disable + * @suppress_m2: if true, treat an M2 (NACK) error from the CCC as success + * + * Send an ENEC or DISEC CCC command to enable or disable some or all events + * coming from a specific slave, or all devices if @addr is + * %I3C_BROADCAST_ADDR. + * + * When @suppress_m2 is true, a NACK of the broadcast (which can happen when + * no devices are present on the bus) is not reported as an error. This is + * useful for callers that want to configure event reporting unconditionally, + * regardless of whether any devices are currently on the bus. + * + * This function must be called with the bus lock held in write mode. + * + * Return: 0 in case of success, or a negative error code otherwise. + */ +int i3c_master_enec_disec_locked(struct i3c_master_controller *master, u8 addr, + bool enable, u8 evts, bool suppress_m2) { struct i3c_ccc_events *events; struct i3c_ccc_cmd_dest dest; @@ -1109,6 +1180,7 @@ static int i3c_master_enec_disec_locked(struct i3c_master_controller *master, return ret; } +EXPORT_SYMBOL_GPL(i3c_master_enec_disec_locked); /** * i3c_master_disec_locked() - send a DISEC CCC command @@ -1553,6 +1625,57 @@ static int i3c_master_retrieve_dev_info(struct i3c_dev_desc *dev) return 0; } +static int i3c_master_getstatus_locked(struct i3c_master_controller *master, + u8 addr, u16 *status) +{ + struct i3c_ccc_getstatus *getstatus; + struct i3c_ccc_cmd_dest dest; + struct i3c_ccc_cmd cmd; + int ret; + + getstatus = i3c_ccc_cmd_dest_init(&dest, addr, sizeof(*getstatus)); + if (!getstatus) + return -ENOMEM; + + i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETSTATUS, &dest, 1); + ret = i3c_master_send_ccc_cmd_locked(master, &cmd); + if (ret) + goto out; + + if (dest.payload.len != sizeof(*getstatus)) { + ret = -EIO; + goto out; + } + + if (status) + *status = be16_to_cpu(getstatus->status); +out: + i3c_ccc_cmd_dest_cleanup(&dest); + + return ret; +} + +/* Values are chosen to give the device plenty of opportunities to respond */ +#define I3C_DEV_PROBE_INITIAL_DELAY_US 20 +#define I3C_DEV_PROBE_DELAY_FACTOR 2 +#define I3C_DEV_PROBE_CNT 5 + +static bool i3c_master_i3c_dev_present(struct i3c_master_controller *master, unsigned int addr) +{ + int delay = I3C_DEV_PROBE_INITIAL_DELAY_US; + + for (int i = 0; i < I3C_DEV_PROBE_CNT; i++) { + if (i) { + fsleep(delay); + delay *= I3C_DEV_PROBE_DELAY_FACTOR; + } + if (!i3c_master_getstatus_locked(master, addr, NULL)) + return true; + } + + return false; +} + static void i3c_master_put_i3c_addrs(struct i3c_dev_desc *dev) { struct i3c_master_controller *master = i3c_dev_get_master(dev); @@ -1652,7 +1775,22 @@ static int i3c_master_attach_i3c_dev(struct i3c_master_controller *master, return 0; } -static int i3c_master_reattach_i3c_dev(struct i3c_dev_desc *dev, +/** + * i3c_master_reattach_i3c_dev_locked() - reattach an I3C device with a new address + * @dev: I3C device descriptor to reattach + * @old_dyn_addr: previous dynamic address of the device + * + * This function reattaches an existing I3C device to the bus when its dynamic + * address has changed. It updates the bus address slot status accordingly: + * - Marks the new dynamic address as occupied by an I3C device. + * - Frees the old dynamic address slot if applicable. + * + * This function must be called with the bus lock held in write mode. + * + * Return: 0 on success, or a negative error code if reattachment fails + * (e.g. -EBUSY if the new address slot is not free). + */ +int i3c_master_reattach_i3c_dev_locked(struct i3c_dev_desc *dev, u8 old_dyn_addr) { struct i3c_master_controller *master = i3c_dev_get_master(dev); @@ -1677,6 +1815,7 @@ static int i3c_master_reattach_i3c_dev(struct i3c_dev_desc *dev, return 0; } +EXPORT_SYMBOL_GPL(i3c_master_reattach_i3c_dev_locked); static void i3c_master_detach_i3c_dev(struct i3c_dev_desc *dev) { @@ -1742,7 +1881,7 @@ static int i3c_master_early_i3c_dev_add(struct i3c_master_controller *master, goto err_detach_dev; i3cdev->info.dyn_addr = i3cdev->boardinfo->init_dyn_addr; - ret = i3c_master_reattach_i3c_dev(i3cdev, 0); + ret = i3c_master_reattach_i3c_dev_locked(i3cdev, 0); if (ret) goto err_rstdaa; @@ -1800,68 +1939,15 @@ i3c_master_register_new_i3c_devs(struct i3c_master_controller *master) } } -/** - * i3c_master_do_daa_ext() - Dynamic Address Assignment (extended version) - * @master: controller - * @rstdaa: whether to first perform Reset of Dynamic Addresses (RSTDAA) - * - * Perform Dynamic Address Assignment with optional support for System - * Hibernation (@rstdaa is true). - * - * After System Hibernation, Dynamic Addresses can have been reassigned at boot - * time to different values. A simple strategy is followed to handle that. - * Perform a Reset of Dynamic Addresses (RSTDAA) followed by the normal DAA - * procedure which has provision for reassigning addresses that differ from the - * previously recorded addresses. - * - * Return: a 0 in case of success, an negative error code otherwise. - */ -int i3c_master_do_daa_ext(struct i3c_master_controller *master, bool rstdaa) +static void i3c_master_reg_work_fn(struct work_struct *work) { - int rstret = 0; - int ret; - - ret = i3c_master_rpm_get(master); - if (ret) - return ret; - - i3c_bus_maintenance_lock(&master->bus); - - if (rstdaa) - rstret = i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR); - - ret = master->ops->do_daa(master); - - i3c_bus_maintenance_unlock(&master->bus); - - if (ret) - goto out; + struct i3c_master_controller *master = container_of(work, typeof(*master), reg_work); i3c_bus_normaluse_lock(&master->bus); - i3c_master_register_new_i3c_devs(master); + if (!master->shutting_down) + i3c_master_register_new_i3c_devs(master); i3c_bus_normaluse_unlock(&master->bus); -out: - i3c_master_rpm_put(master); - - return rstret ?: ret; } -EXPORT_SYMBOL_GPL(i3c_master_do_daa_ext); - -/** - * i3c_master_do_daa() - do a DAA (Dynamic Address Assignment) - * @master: master doing the DAA - * - * This function instantiates I3C device objects and adds them to the - * I3C device list. All device information is automatically retrieved using - * standard CCC commands. - * - * Return: a 0 in case of success, an negative error code otherwise. - */ -int i3c_master_do_daa(struct i3c_master_controller *master) -{ - return i3c_master_do_daa_ext(master, false); -} -EXPORT_SYMBOL_GPL(i3c_master_do_daa); /** * i3c_master_dma_map_single() - Map buffer for single DMA transfer @@ -2249,42 +2335,49 @@ i3c_master_search_i3c_dev_duplicate(struct i3c_dev_desc *refdev) } /** - * i3c_master_add_i3c_dev_locked() - add an I3C slave to the bus + * __i3c_master_add_i3c_dev_locked() - add an I3C slave to the bus * @master: master used to send frames on the bus * @addr: I3C slave dynamic address assigned to the device + * @probe: probe to see if the device is really present at @addr * - * This function is instantiating an I3C device object and adding it to the - * I3C device list. All device information are automatically retrieved using - * standard CCC commands. - * - * The I3C device object is returned in case the master wants to attach - * private data to it using i3c_dev_set_master_data(). + * This function instantiates an I3C device object and adds it to the I3C device + * list. All device information is retrieved using standard CCC commands. * * This function must be called with the bus lock held in write mode. - * - * Return: a 0 in case of success, an negative error code otherwise. */ -int i3c_master_add_i3c_dev_locked(struct i3c_master_controller *master, - u8 addr) +static void __i3c_master_add_i3c_dev_locked(struct i3c_master_controller *master, + u8 addr, bool probe) { struct i3c_device_info info = { .dyn_addr = addr }; struct i3c_dev_desc *newdev, *olddev; u8 old_dyn_addr = addr, expected_dyn_addr; struct i3c_ibi_setup ibireq = { }; bool enable_ibi = false; + bool no_dev = false; int ret; - if (!master) - return -EINVAL; - newdev = i3c_master_alloc_i3c_dev(master, &info); - if (IS_ERR(newdev)) - return PTR_ERR(newdev); + if (IS_ERR(newdev)) { + ret = PTR_ERR(newdev); + goto err_prevent_addr_reuse; + } ret = i3c_master_attach_i3c_dev(master, newdev); if (ret) goto err_free_dev; + /* + * When a dynamic address is first assigned, there is no need to check + * whether it is still assigned, however, if adding the device fails, + * it will be attempted again later, at which point the address may + * have been lost (e.g. due to power management), so for that case, + * probe to see if the device is still present at the assigned address. + */ + if (probe && !i3c_master_i3c_dev_present(master, addr)) { + no_dev = true; + goto err_detach_dev; + } + ret = i3c_master_retrieve_dev_info(newdev); if (ret) goto err_detach_dev; @@ -2358,7 +2451,7 @@ int i3c_master_add_i3c_dev_locked(struct i3c_master_controller *master, if (!ret) { old_dyn_addr = newdev->info.dyn_addr; newdev->info.dyn_addr = expected_dyn_addr; - i3c_master_reattach_i3c_dev(newdev, old_dyn_addr); + i3c_master_reattach_i3c_dev_locked(newdev, old_dyn_addr); } else { dev_err(&master->dev, "Failed to assign reserved/old address to device %d%llx", @@ -2390,7 +2483,7 @@ int i3c_master_add_i3c_dev_locked(struct i3c_master_controller *master, mutex_unlock(&newdev->ibi_lock); } - return 0; + return; err_detach_dev: if (newdev->dev && newdev->dev->desc) @@ -2401,10 +2494,129 @@ err_detach_dev: err_free_dev: i3c_master_free_i3c_dev(newdev); - return ret; +err_prevent_addr_reuse: + if (no_dev) + return; + /* + * Although the device has not been added, the address has been + * assigned. Prevent the address from being used again. + */ + if (i3c_bus_get_addr_slot_status(&master->bus, addr) == I3C_ADDR_SLOT_FREE) + i3c_bus_set_addr_slot_status(&master->bus, addr, I3C_ADDR_SLOT_I3C_DEV); + + dev_err(&master->dev, "Failed to add I3C device at address %u, error %d\n", addr, ret); +} + +/** + * i3c_master_add_i3c_dev_locked() - add an I3C slave to the bus + * @master: master used to send frames on the bus + * @addr: I3C slave dynamic address assigned to the device + * + * This function instantiates an I3C device object and adds it to the + * I3C device list. All device information is automatically retrieved using + * standard CCC commands. + * + * This function must be called with the bus lock held in write mode. + */ +void i3c_master_add_i3c_dev_locked(struct i3c_master_controller *master, u8 addr) +{ + __i3c_master_add_i3c_dev_locked(master, addr, false); } EXPORT_SYMBOL_GPL(i3c_master_add_i3c_dev_locked); +static void i3c_master_reconcile_dyn_addrs(struct i3c_master_controller *master) +{ + DECLARE_BITMAP(dev_dyn_addrs, I2C_MAX_ADDR + 1); + enum i3c_addr_slot_status status; + struct i3c_dev_desc *desc; + + /* Mark all devices' dynamic and static addresses in the bitmap */ + bitmap_zero(dev_dyn_addrs, I2C_MAX_ADDR + 1); + i3c_bus_for_each_i3cdev(&master->bus, desc) { + if (desc->info.static_addr) + __set_bit(desc->info.static_addr, dev_dyn_addrs); + __set_bit(desc->info.dyn_addr, dev_dyn_addrs); + } + /* Reconcile the bitmap with the bus address slot status */ + for (unsigned int addr = 0; addr <= I2C_MAX_ADDR; addr++) { + status = i3c_bus_get_addr_slot_status(&master->bus, addr); + if (status != I3C_ADDR_SLOT_I3C_DEV || test_bit(addr, dev_dyn_addrs)) + continue; + i3c_bus_set_addr_slot_status(&master->bus, addr, I3C_ADDR_SLOT_FREE); + /* Try to add the device, but probe to see if it is really present */ + __i3c_master_add_i3c_dev_locked(master, addr, true); + } +} + +/** + * i3c_master_do_daa_ext() - Dynamic Address Assignment (extended version) + * @master: controller + * @rstdaa: whether to first perform Reset of Dynamic Addresses (RSTDAA) + * + * Perform Dynamic Address Assignment with optional support for System + * Hibernation (@rstdaa is true). + * + * After System Hibernation, Dynamic Addresses can have been reassigned at boot + * time to different values. A simple strategy is followed to handle that. + * Perform a Reset of Dynamic Addresses (RSTDAA) followed by the normal DAA + * procedure which has provision for reassigning addresses that differ from the + * previously recorded addresses. + * + * Return: a 0 in case of success, an negative error code otherwise. + */ +int i3c_master_do_daa_ext(struct i3c_master_controller *master, bool rstdaa) +{ + int rstret = 0; + int ret; + + ret = i3c_master_rpm_get(master); + if (ret) + return ret; + + i3c_bus_maintenance_lock(&master->bus); + + if (master->shutting_down) { + ret = -ENODEV; + } else { + if (rstdaa) + rstret = i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR); + ret = master->ops->do_daa(master); + /* + * Handle cases where a dynamic address was assigned but the + * device was not successfully added. + */ + i3c_master_reconcile_dyn_addrs(master); + } + + i3c_bus_maintenance_unlock(&master->bus); + + if (ret) + goto out; + + queue_work(master->wq, &master->reg_work); +out: + i3c_master_rpm_put(master); + + return rstret ?: ret; +} +EXPORT_SYMBOL_GPL(i3c_master_do_daa_ext); + +/** + * i3c_master_do_daa() - do a DAA (Dynamic Address Assignment) + * @master: master doing the DAA + * + * This function instantiates I3C device objects and adds them to the + * I3C device list. All device information is automatically retrieved using + * standard CCC commands. + * + * Return: a 0 in case of success, an negative error code otherwise. + */ +int i3c_master_do_daa(struct i3c_master_controller *master) +{ + return i3c_master_do_daa_ext(master, false); +} +EXPORT_SYMBOL_GPL(i3c_master_do_daa); + #define OF_I3C_REG1_IS_I2C_DEV BIT(31) static int @@ -3079,11 +3291,13 @@ int i3c_master_register(struct i3c_master_controller *master, if (ret) goto err_put_dev; - master->wq = alloc_workqueue("%s", WQ_PERCPU, 0, dev_name(parent)); + master->wq = alloc_workqueue("%s", WQ_PERCPU | WQ_FREEZABLE, 0, dev_name(parent)); if (!master->wq) { ret = -ENOMEM; goto err_put_dev; } + INIT_WORK(&master->hj_work, i3c_master_hj_work_fn); + INIT_WORK(&master->reg_work, i3c_master_reg_work_fn); ret = i3c_master_bus_init(master); if (ret) @@ -3109,12 +3323,15 @@ int i3c_master_register(struct i3c_master_controller *master, /* * We're done initializing the bus and the controller, we can now - * register I3C devices discovered during the initial DAA. + * register I3C devices discovered during the initial DAA. Device + * registration is done via reg_work because that keeps a single + * registration code path and ensures the worker is the only writer + * of desc->dev. Flush the work to preserve synchronous probe-time + * behavior. */ master->init_done = true; - i3c_bus_normaluse_lock(&master->bus); - i3c_master_register_new_i3c_devs(master); - i3c_bus_normaluse_unlock(&master->bus); + queue_work(master->wq, &master->reg_work); + flush_work(&master->reg_work); if (master->ops->set_dev_nack_retry) device_create_file(&master->dev, &dev_attr_dev_nack_retry_count); @@ -3146,6 +3363,7 @@ EXPORT_SYMBOL_GPL(i3c_master_register); void i3c_master_unregister(struct i3c_master_controller *master) { i3c_bus_notify(&master->bus, I3C_NOTIFY_BUS_REMOVE); + i3c_master_shutdown(master); if (master->ops->set_dev_nack_retry) device_remove_file(&master->dev, &dev_attr_dev_nack_retry_count); @@ -3195,6 +3413,16 @@ int i3c_dev_do_xfers_locked(struct i3c_dev_desc *dev, struct i3c_xfer *xfers, return master->ops->i3c_xfers(dev, xfers, nxfers, mode); } +/** + * i3c_dev_disable_ibi_locked() - Disable IBIs coming from a specific device + * @dev: device on which IBIs should be disabled + * + * This function disable IBIs coming from a specific device and wait for + * all pending IBIs to be processed. + * + * Context: Must be called with mutex_lock(&dev->desc->ibi_lock) held. + * Return: 0 in case of success, a negative error core otherwise. + */ int i3c_dev_disable_ibi_locked(struct i3c_dev_desc *dev) { struct i3c_master_controller *master; @@ -3216,7 +3444,22 @@ int i3c_dev_disable_ibi_locked(struct i3c_dev_desc *dev) return 0; } +EXPORT_SYMBOL_GPL(i3c_dev_disable_ibi_locked); +/** + * i3c_dev_enable_ibi_locked() - Enable IBIs from a specific device (lock held) + * @dev: device on which IBIs should be enabled + * + * This function enable IBIs coming from a specific device and wait for + * all pending IBIs to be processed. This should be called on a device + * where i3c_device_request_ibi() has succeeded. + * + * Note that IBIs from this device might be received before this function + * returns to its caller. + * + * Context: Must be called with mutex_lock(&dev->desc->ibi_lock) held. + * Return: 0 on success, or a negative error code on failure. + */ int i3c_dev_enable_ibi_locked(struct i3c_dev_desc *dev) { struct i3c_master_controller *master = i3c_dev_get_master(dev); @@ -3231,7 +3474,20 @@ int i3c_dev_enable_ibi_locked(struct i3c_dev_desc *dev) return ret; } +EXPORT_SYMBOL_GPL(i3c_dev_enable_ibi_locked); +/** + * i3c_dev_request_ibi_locked() - Request an IBI + * @dev: device for which we should enable IBIs + * @req: setup requested for this IBI + * + * This function is responsible for pre-allocating all resources needed to + * process IBIs coming from @dev. When this function returns, the IBI is not + * enabled until i3c_device_enable_ibi() is called. + * + * Context: Must be called with mutex_lock(&dev->desc->ibi_lock) held. + * Return: 0 in case of success, a negative error core otherwise. + */ int i3c_dev_request_ibi_locked(struct i3c_dev_desc *dev, const struct i3c_ibi_setup *req) { @@ -3270,7 +3526,18 @@ int i3c_dev_request_ibi_locked(struct i3c_dev_desc *dev, return ret; } +EXPORT_SYMBOL_GPL(i3c_dev_request_ibi_locked); +/** + * i3c_dev_free_ibi_locked() - Free all resources needed for IBI handling + * @dev: device on which you want to release IBI resources + * + * This function is responsible for de-allocating resources previously + * allocated by i3c_device_request_ibi(). It should be called after disabling + * IBIs with i3c_device_disable_ibi(). + * + * Context: Must be called with mutex_lock(&dev->desc->ibi_lock) held. + */ void i3c_dev_free_ibi_locked(struct i3c_dev_desc *dev) { struct i3c_master_controller *master = i3c_dev_get_master(dev); @@ -3301,6 +3568,7 @@ void i3c_dev_free_ibi_locked(struct i3c_dev_desc *dev) kfree(dev->ibi); dev->ibi = NULL; } +EXPORT_SYMBOL_GPL(i3c_dev_free_ibi_locked); static int __init i3c_init(void) { diff --git a/drivers/i3c/master/dw-i3c-master.c b/drivers/i3c/master/dw-i3c-master.c index 655693a2187e..2f8c0c4683e0 100644 --- a/drivers/i3c/master/dw-i3c-master.c +++ b/drivers/i3c/master/dw-i3c-master.c @@ -1435,7 +1435,11 @@ static void dw_i3c_master_irq_handle_ibis(struct dw_i3c_master *master) u32 reg; reg = readl(master->regs + QUEUE_STATUS_LEVEL); - n_ibis = QUEUE_STATUS_IBI_STATUS_CNT(reg); + if (master->has_ibi_data) + n_ibis = QUEUE_STATUS_IBI_STATUS_CNT(reg); + else + n_ibis = QUEUE_STATUS_IBI_BUF_BLR(reg); + if (!n_ibis) return; @@ -1445,7 +1449,7 @@ static void dw_i3c_master_irq_handle_ibis(struct dw_i3c_master *master) if (IBI_TYPE_SIRQ(reg)) { dw_i3c_master_handle_ibi_sir(master, reg); } else if (IBI_TYPE_HJ(reg)) { - queue_work(master->base.wq, &master->hj_work); + i3c_master_queue_hotjoin(&master->base); } else { len = IBI_QUEUE_STATUS_DATA_LEN(reg); dev_info(&master->base.dev, @@ -1481,7 +1485,7 @@ static irqreturn_t dw_i3c_master_irq_handler(int irq, void *dev_id) } static int dw_i3c_master_set_dev_nack_retry(struct i3c_master_controller *m, - unsigned long dev_nack_retry_cnt) + unsigned int dev_nack_retry_cnt) { struct dw_i3c_master *master = to_dw_i3c_master(m); u32 reg; @@ -1489,7 +1493,7 @@ static int dw_i3c_master_set_dev_nack_retry(struct i3c_master_controller *m, if (dev_nack_retry_cnt > DW_I3C_DEV_NACK_RETRY_CNT_MAX) { dev_err(&master->base.dev, - "Value %ld exceeds maximum %d\n", + "Value %u exceeds maximum %d\n", dev_nack_retry_cnt, DW_I3C_DEV_NACK_RETRY_CNT_MAX); return -ERANGE; } @@ -1554,18 +1558,11 @@ static const struct dw_i3c_platform_ops dw_i3c_platform_ops_default = { .set_dat_ibi = dw_i3c_platform_set_dat_ibi_nop, }; -static void dw_i3c_hj_work(struct work_struct *work) -{ - struct dw_i3c_master *master = - container_of(work, typeof(*master), hj_work); - - i3c_master_do_daa(&master->base); -} - int dw_i3c_common_probe(struct dw_i3c_master *master, struct platform_device *pdev) { int ret, irq; + u32 thld_ctrl; const struct dw_i3c_drvdata *drvdata; unsigned long quirks = 0; @@ -1623,6 +1620,20 @@ int dw_i3c_common_probe(struct dw_i3c_master *master, master->maxdevs = ret >> 16; master->free_pos = GENMASK(master->maxdevs - 1, 0); + /* + * Detect IBI data capability (IC_HAS_IBI_DATA): write a non-zero value + * to IBI_DATA_THLD and read back. On controllers like Versalnet + * the field is hardwired to 0 and the write is ignored. Restore the + * original register value after detection. + */ + thld_ctrl = readl(master->regs + QUEUE_THLD_CTRL); + ret = thld_ctrl | QUEUE_THLD_CTRL_IBI_DATA(2); + writel(ret, master->regs + QUEUE_THLD_CTRL); + ret = readl(master->regs + QUEUE_THLD_CTRL); + if (ret & QUEUE_THLD_CTRL_IBI_DATA_MASK) + master->has_ibi_data = true; + writel(thld_ctrl, master->regs + QUEUE_THLD_CTRL); + if (has_acpi_companion(&pdev->dev)) { quirks = (unsigned long)device_get_match_data(&pdev->dev); } else if (pdev->dev.of_node) { @@ -1636,8 +1647,6 @@ int dw_i3c_common_probe(struct dw_i3c_master *master, if (master->quirks & DW_I3C_DISABLE_RUNTIME_PM_QUIRK) pm_runtime_get_noresume(&pdev->dev); - INIT_WORK(&master->hj_work, dw_i3c_hj_work); - device_set_of_node_from_dev(&master->base.i2c.dev, &pdev->dev); ret = i3c_master_register(&master->base, &pdev->dev, &dw_mipi_i3c_ops, false); @@ -1659,7 +1668,6 @@ EXPORT_SYMBOL_GPL(dw_i3c_common_probe); void dw_i3c_common_remove(struct dw_i3c_master *master) { - cancel_work_sync(&master->hj_work); i3c_master_unregister(&master->base); /* Balance pm_runtime_get_noresume() from probe() */ @@ -1804,8 +1812,6 @@ static void dw_i3c_shutdown(struct platform_device *pdev) return; } - cancel_work_sync(&master->hj_work); - /* Disable interrupts */ writel((u32)~INTR_ALL, master->regs + INTR_STATUS_EN); writel((u32)~INTR_ALL, master->regs + INTR_SIGNAL_EN); diff --git a/drivers/i3c/master/dw-i3c-master.h b/drivers/i3c/master/dw-i3c-master.h index c5cb695c16ab..28e9348f2153 100644 --- a/drivers/i3c/master/dw-i3c-master.h +++ b/drivers/i3c/master/dw-i3c-master.h @@ -51,6 +51,7 @@ struct dw_i3c_master { u32 i2c_fm_timing; u32 i2c_fmp_timing; u32 quirks; + bool has_ibi_data; /* * Per-device hardware data, used to manage the device address table * (DAT) @@ -68,8 +69,6 @@ struct dw_i3c_master { /* platform-specific data */ const struct dw_i3c_platform_ops *platform_ops; - - struct work_struct hj_work; }; struct dw_i3c_platform_ops { diff --git a/drivers/i3c/master/i3c-master-cdns.c b/drivers/i3c/master/i3c-master-cdns.c index 5cfec6761494..6d221596ea35 100644 --- a/drivers/i3c/master/i3c-master-cdns.c +++ b/drivers/i3c/master/i3c-master-cdns.c @@ -398,7 +398,6 @@ struct cdns_i3c_data { }; struct cdns_i3c_master { - struct work_struct hj_work; struct i3c_master_controller base; u32 free_rr_slots; unsigned int maxdevs; @@ -1357,7 +1356,7 @@ static void cnds_i3c_master_demux_ibis(struct cdns_i3c_master *master) case IBIR_TYPE_HJ: WARN_ON(IBIR_XFER_BYTES(ibir) || (ibir & IBIR_ERROR)); - queue_work(master->base.wq, &master->hj_work); + i3c_master_queue_hotjoin(&master->base); break; case IBIR_TYPE_MR: @@ -1528,15 +1527,6 @@ static const struct i3c_master_controller_ops cdns_i3c_master_ops = { .recycle_ibi_slot = cdns_i3c_master_recycle_ibi_slot, }; -static void cdns_i3c_master_hj(struct work_struct *work) -{ - struct cdns_i3c_master *master = container_of(work, - struct cdns_i3c_master, - hj_work); - - i3c_master_do_daa(&master->base); -} - static struct cdns_i3c_data cdns_i3c_devdata = { .thd_delay_ns = 10, }; @@ -1584,7 +1574,6 @@ static int cdns_i3c_master_probe(struct platform_device *pdev) spin_lock_init(&master->xferqueue.lock); INIT_LIST_HEAD(&master->xferqueue.list); - INIT_WORK(&master->hj_work, cdns_i3c_master_hj); writel(0xffffffff, master->regs + MST_IDR); writel(0xffffffff, master->regs + SLV_IDR); ret = devm_request_irq(&pdev->dev, irq, cdns_i3c_master_interrupt, 0, @@ -1627,7 +1616,6 @@ static void cdns_i3c_master_remove(struct platform_device *pdev) { struct cdns_i3c_master *master = platform_get_drvdata(pdev); - cancel_work_sync(&master->hj_work); i3c_master_unregister(&master->base); } diff --git a/drivers/i3c/master/mipi-i3c-hci/cmd.h b/drivers/i3c/master/mipi-i3c-hci/cmd.h index b1bf87daa651..7bada7b4b2de 100644 --- a/drivers/i3c/master/mipi-i3c-hci/cmd.h +++ b/drivers/i3c/master/mipi-i3c-hci/cmd.h @@ -65,4 +65,10 @@ struct hci_cmd_ops { extern const struct hci_cmd_ops mipi_i3c_hci_cmd_v1; extern const struct hci_cmd_ops mipi_i3c_hci_cmd_v2; +static inline void hci_cmd_set_resp_err(u32 *response, int resp_err) +{ + *response &= ~RESP_ERR_FIELD; + *response |= FIELD_PREP(RESP_ERR_FIELD, resp_err); +} + #endif diff --git a/drivers/i3c/master/mipi-i3c-hci/cmd_v1.c b/drivers/i3c/master/mipi-i3c-hci/cmd_v1.c index 75d452d7f6af..3b9345718d27 100644 --- a/drivers/i3c/master/mipi-i3c-hci/cmd_v1.c +++ b/drivers/i3c/master/mipi-i3c-hci/cmd_v1.c @@ -358,9 +358,7 @@ static int hci_cmd_v1_daa(struct i3c_hci *hci) * TODO: Extend the subsystem layer to allow for registering * new device and provide BCR/DCR/PID at the same time. */ - ret = i3c_master_add_i3c_dev_locked(&hci->master, next_addr); - if (ret) - break; + i3c_master_add_i3c_dev_locked(&hci->master, next_addr); } if (dat_idx >= 0) diff --git a/drivers/i3c/master/mipi-i3c-hci/cmd_v2.c b/drivers/i3c/master/mipi-i3c-hci/cmd_v2.c index 39eec26a363c..8d93748e858d 100644 --- a/drivers/i3c/master/mipi-i3c-hci/cmd_v2.c +++ b/drivers/i3c/master/mipi-i3c-hci/cmd_v2.c @@ -296,9 +296,7 @@ static int hci_cmd_v2_daa(struct i3c_hci *hci) * TODO: Extend the subsystem layer to allow for registering * new device and provide BCR/DCR/PID at the same time. */ - ret = i3c_master_add_i3c_dev_locked(&hci->master, next_addr); - if (ret) - break; + i3c_master_add_i3c_dev_locked(&hci->master, next_addr); } hci_free_xfer(xfer, 2); diff --git a/drivers/i3c/master/mipi-i3c-hci/core.c b/drivers/i3c/master/mipi-i3c-hci/core.c index b781dbed2165..e80aa1f5722e 100644 --- a/drivers/i3c/master/mipi-i3c-hci/core.c +++ b/drivers/i3c/master/mipi-i3c-hci/core.c @@ -8,6 +8,7 @@ */ #include <linux/bitfield.h> +#include <linux/clk.h> #include <linux/device.h> #include <linux/errno.h> #include <linux/i3c/master.h> @@ -22,6 +23,7 @@ #include "ext_caps.h" #include "cmd.h" #include "dat.h" +#include "ibi.h" /* * Host Controller Capabilities and Operation Registers @@ -124,6 +126,7 @@ static void i3c_hci_set_master_dyn_addr(struct i3c_hci *hci) static int i3c_hci_bus_init(struct i3c_master_controller *m) { struct i3c_hci *hci = to_i3c_hci(m); + struct device *dev = hci->master.dev.parent; struct i3c_device_info info; int ret; @@ -144,6 +147,10 @@ static int i3c_hci_bus_init(struct i3c_master_controller *m) if (ret) return ret; + hci->ibi_devs = devm_kcalloc(dev, hci->DAT_entries, sizeof(*hci->ibi_devs), GFP_KERNEL); + if (!hci->ibi_devs) + return -ENOMEM; + ret = hci->io->init(hci); if (ret) return ret; @@ -231,7 +238,20 @@ static void i3c_hci_bus_cleanup(struct i3c_master_controller *m) void mipi_i3c_hci_resume(struct i3c_hci *hci) { - reg_set(HC_CONTROL, HC_CONTROL_RESUME); + u32 reg = reg_read(HC_CONTROL); + + reg |= HC_CONTROL_RESUME; + reg &= ~HC_CONTROL_ABORT; + reg_write(HC_CONTROL, reg); +} + +void mipi_i3c_hci_abort(struct i3c_hci *hci) +{ + u32 reg = reg_read(HC_CONTROL); + + reg &= ~HC_CONTROL_RESUME; /* Do not set resume */ + reg |= HC_CONTROL_ABORT; + reg_write(HC_CONTROL, reg); } /* located here rather than pio.c because needed bits are in core reg space */ @@ -240,6 +260,18 @@ void mipi_i3c_hci_pio_reset(struct i3c_hci *hci) reg_write(RESET_CONTROL, RX_FIFO_RST | TX_FIFO_RST | RESP_QUEUE_RST); } +#define ALL_QUEUES_RST (CMD_QUEUE_RST | RESP_QUEUE_RST | RX_FIFO_RST | TX_FIFO_RST | IBI_QUEUE_RST) + +void mipi_i3c_hci_pio_reset_all_queues(struct i3c_hci *hci) +{ + u32 regval; + + reg_write(RESET_CONTROL, ALL_QUEUES_RST); + if (readx_poll_timeout_atomic(reg_read, RESET_CONTROL, regval, + !(regval & ALL_QUEUES_RST), 0, 20)) + dev_err(&hci->master.dev, "%s: Reset queues failed\n", __func__); +} + /* located here rather than dct.c because needed bits are in core reg space */ void mipi_i3c_hci_dct_index_reset(struct i3c_hci *hci) { @@ -250,13 +282,30 @@ int i3c_hci_process_xfer(struct i3c_hci *hci, struct hci_xfer *xfer, int n) { struct completion *done = xfer[n - 1].completion; unsigned long timeout = xfer[n - 1].timeout; + unsigned long remaining_timeout = timeout; + long time_taken; + bool started; int ret; + xfer[0].started = false; + ret = hci->io->queue_xfer(hci, xfer, n); if (ret) return ret; - if (!wait_for_completion_timeout(done, timeout)) { + while (!wait_for_completion_timeout(done, remaining_timeout)) { + scoped_guard(spinlock_irqsave, &hci->lock) { + started = xfer[0].started; + time_taken = jiffies - xfer[0].start_jiffies; + } + /* Keep waiting if xfer has not started */ + if (!started) + continue; + /* Recalculate timeout based on actual start time */ + if (time_taken < timeout) { + remaining_timeout = timeout - time_taken; + continue; + } if (hci->io->dequeue_xfer(hci, xfer, n)) { dev_err(&hci->master.dev, "%s: timeout error\n", __func__); return -ETIMEDOUT; @@ -350,11 +399,52 @@ out: return ret; } +static int i3c_hci_enable_hotjoin(struct i3c_master_controller *m) +{ + struct i3c_hci *hci = to_i3c_hci(m); + int ret; + + reg_clear(HC_CONTROL, HC_CONTROL_HOT_JOIN_CTRL); + + /* + * Broadcast Hot_join enable, so that an I3C device that has previously + * had its Hot-Join request NACK'ed knows to try again. + */ + ret = i3c_master_enec_disec_locked(m, I3C_BROADCAST_ADDR, true, I3C_CCC_EVENT_HJ, true); + if (ret) { + reg_set(HC_CONTROL, HC_CONTROL_HOT_JOIN_CTRL); + dev_err(&hci->master.dev, "Hot-Join ENEC CCC failed\n"); + } + + return ret; +} + +static int i3c_hci_disable_hotjoin(struct i3c_master_controller *m) +{ + struct i3c_hci *hci = to_i3c_hci(m); + + reg_set(HC_CONTROL, HC_CONTROL_HOT_JOIN_CTRL); + return 0; +} + static int i3c_hci_daa(struct i3c_master_controller *m) { struct i3c_hci *hci = to_i3c_hci(m); + int ret; + + ret = hci->cmd->perform_daa(hci); - return hci->cmd->perform_daa(hci); + if (!hci->hj_init_done) { + hci->hj_init_done = true; + /* + * Enable Hot-Join by default after initial DAA if it does not + * prevent runtime suspend. + */ + if (m->rpm_ibi_allowed && !ret) + m->hotjoin = !i3c_hci_enable_hotjoin(m); + } + + return ret; } static int i3c_hci_i3c_xfers(struct i3c_dev_desc *dev, @@ -556,14 +646,40 @@ static int i3c_hci_request_ibi(struct i3c_dev_desc *dev, return hci->io->request_ibi(hci, dev, req); } +static void __i3c_hci_disable_ibi(struct i3c_hci *hci, struct i3c_dev_desc *dev) +{ + struct i3c_hci_dev_data *dev_data = i3c_dev_get_master_data(dev); + + mipi_i3c_hci_dat_v1.set_flags(hci, dev_data->dat_idx, DAT_0_SIR_REJECT, 0); + scoped_guard(spinlock_irqsave, &hci->lock) + hci->ibi_devs[dev_data->dat_idx] = NULL; +} + static void i3c_hci_free_ibi(struct i3c_dev_desc *dev) { struct i3c_master_controller *m = i3c_dev_get_master(dev); struct i3c_hci *hci = to_i3c_hci(m); + /* Must ensure the IBI has been disabled */ + __i3c_hci_disable_ibi(hci, dev); hci->io->free_ibi(hci, dev); } +struct i3c_dev_desc *i3c_hci_addr_to_dev(struct i3c_hci *hci, unsigned int addr) +{ + int dat_idx; + + lockdep_assert_held(&hci->lock); + + for (dat_idx = 0; dat_idx < hci->DAT_entries; dat_idx++) { + struct i3c_dev_desc *dev = hci->ibi_devs[dat_idx]; + + if (dev && dev->info.dyn_addr == addr) + return dev; + } + return NULL; +} + static int i3c_hci_enable_ibi(struct i3c_dev_desc *dev) { struct i3c_master_controller *m = i3c_dev_get_master(dev); @@ -571,6 +687,8 @@ static int i3c_hci_enable_ibi(struct i3c_dev_desc *dev) struct i3c_hci_dev_data *dev_data = i3c_dev_get_master_data(dev); mipi_i3c_hci_dat_v1.clear_flags(hci, dev_data->dat_idx, DAT_0_SIR_REJECT, 0); + scoped_guard(spinlock_irqsave, &hci->lock) + hci->ibi_devs[dev_data->dat_idx] = dev; return i3c_master_enec_locked(m, dev->info.dyn_addr, I3C_CCC_EVENT_SIR); } @@ -578,10 +696,15 @@ static int i3c_hci_disable_ibi(struct i3c_dev_desc *dev) { struct i3c_master_controller *m = i3c_dev_get_master(dev); struct i3c_hci *hci = to_i3c_hci(m); - struct i3c_hci_dev_data *dev_data = i3c_dev_get_master_data(dev); - mipi_i3c_hci_dat_v1.set_flags(hci, dev_data->dat_idx, DAT_0_SIR_REJECT, 0); - return i3c_master_disec_locked(m, dev->info.dyn_addr, I3C_CCC_EVENT_SIR); + __i3c_hci_disable_ibi(hci, dev); + /* + * The DAT entry is now set to NACK and DISEC this target's IBIs, so + * the IBI teardown can proceed even if DISEC below fails, so ignore + * errors. + */ + i3c_master_disec_locked(m, dev->info.dyn_addr, I3C_CCC_EVENT_SIR); + return 0; } static void i3c_hci_recycle_ibi_slot(struct i3c_dev_desc *dev, @@ -610,6 +733,8 @@ static const struct i3c_master_controller_ops i3c_hci_ops = { .enable_ibi = i3c_hci_enable_ibi, .disable_ibi = i3c_hci_disable_ibi, .recycle_ibi_slot = i3c_hci_recycle_ibi_slot, + .enable_hotjoin = i3c_hci_enable_hotjoin, + .disable_hotjoin = i3c_hci_disable_hotjoin, }; static irqreturn_t i3c_hci_irq_handler(int irq, void *dev_id) @@ -643,6 +768,7 @@ static irqreturn_t i3c_hci_irq_handler(int irq, void *dev_id) if (val & INTR_HC_INTERNAL_ERR) { dev_err(&hci->master.dev, "Host Controller Internal Error\n"); val &= ~INTR_HC_INTERNAL_ERR; + hci->recovery_needed = true; } if (val) @@ -762,15 +888,10 @@ static int i3c_hci_reset_and_init(struct i3c_hci *hci) int i3c_hci_rpm_suspend(struct device *dev) { struct i3c_hci *hci = dev_get_drvdata(dev); - int ret; - ret = i3c_hci_bus_disable(hci); - if (ret) { - /* Fall back to software reset to disable the bus */ - ret = i3c_hci_software_reset(hci); - i3c_hci_sync_irq_inactive(hci); - return ret; - } + /* Fall back to software reset to disable the bus */ + if (i3c_hci_bus_disable(hci)) + i3c_hci_software_reset(hci); hci->io->suspend(hci); @@ -778,9 +899,8 @@ int i3c_hci_rpm_suspend(struct device *dev) } EXPORT_SYMBOL_GPL(i3c_hci_rpm_suspend); -int i3c_hci_rpm_resume(struct device *dev) +static int i3c_hci_do_reset_and_restore(struct i3c_hci *hci) { - struct i3c_hci *hci = dev_get_drvdata(dev); int ret; ret = i3c_hci_reset_and_init(hci); @@ -796,11 +916,28 @@ int i3c_hci_rpm_resume(struct device *dev) scoped_guard(spinlock_irqsave, &hci->lock) hci->irq_inactive = false; - /* Enable bus with Hot-Join disabled */ - reg_set(HC_CONTROL, HC_CONTROL_BUS_ENABLE | HC_CONTROL_HOT_JOIN_CTRL); + /* Enable bus, restoring hot-join state */ + reg_set(HC_CONTROL, + HC_CONTROL_BUS_ENABLE | (hci->master.hotjoin ? 0 : HC_CONTROL_HOT_JOIN_CTRL)); return 0; } + +int i3c_hci_reset_and_restore(struct i3c_hci *hci) +{ + i3c_hci_bus_disable(hci); + + hci->io->suspend(hci); + + return i3c_hci_do_reset_and_restore(hci); +} + +int i3c_hci_rpm_resume(struct device *dev) +{ + struct i3c_hci *hci = dev_get_drvdata(dev); + + return i3c_hci_do_reset_and_restore(hci); +} EXPORT_SYMBOL_GPL(i3c_hci_rpm_resume); static int i3c_hci_runtime_suspend(struct device *dev) @@ -969,6 +1106,7 @@ static int i3c_hci_init(struct i3c_hci *hci) static int i3c_hci_probe(struct platform_device *pdev) { const struct mipi_i3c_hci_platform_data *pdata = pdev->dev.platform_data; + struct clk_bulk_data *clks; struct i3c_hci *hci; int irq, ret; @@ -978,6 +1116,7 @@ static int i3c_hci_probe(struct platform_device *pdev) spin_lock_init(&hci->lock); mutex_init(&hci->control_mutex); + init_waitqueue_head(&hci->enqueue_wait_queue); /* * Multi-bus instances share the same MMIO address range, but not @@ -1001,6 +1140,11 @@ static int i3c_hci_probe(struct platform_device *pdev) if (!hci->quirks && platform_get_device_id(pdev)) hci->quirks = platform_get_device_id(pdev)->driver_data; + ret = devm_clk_bulk_get_all_enabled(&pdev->dev, &clks); + if (ret < 0) + return dev_err_probe(&pdev->dev, ret, + "Failed to get clocks\n"); + ret = i3c_hci_init(hci); if (ret) return ret; @@ -1031,6 +1175,9 @@ static void i3c_hci_remove(struct platform_device *pdev) static const __maybe_unused struct of_device_id i3c_hci_of_match[] = { { .compatible = "mipi-i3c-hci", }, + { .compatible = "microchip,sama7d65-i3c-hci", + .data = (void *)(ulong)(HCI_QUIRK_PIO_MODE | HCI_QUIRK_OD_PP_TIMING | + HCI_QUIRK_RESP_BUF_THLD) }, {}, }; MODULE_DEVICE_TABLE(of, i3c_hci_of_match); @@ -1042,9 +1189,14 @@ static const struct acpi_device_id i3c_hci_acpi_match[] = { MODULE_DEVICE_TABLE(acpi, i3c_hci_acpi_match); static const struct platform_device_id i3c_hci_driver_ids[] = { - { .name = "intel-lpss-i3c", HCI_QUIRK_RPM_ALLOWED | - HCI_QUIRK_RPM_IBI_ALLOWED | - HCI_QUIRK_RPM_PARENT_MANAGED }, + { + .name = "intel-lpss-i3c", + .driver_data = HCI_QUIRK_RPM_ALLOWED | + HCI_QUIRK_RPM_IBI_ALLOWED | + HCI_QUIRK_RPM_PARENT_MANAGED | + HCI_QUIRK_DMA_ABORT_REQUIRES_PIO_RESET | + HCI_QUIRK_DMA_REQUIRES_HC_ABORT, + }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(platform, i3c_hci_driver_ids); diff --git a/drivers/i3c/master/mipi-i3c-hci/dma.c b/drivers/i3c/master/mipi-i3c-hci/dma.c index e4daaa612055..0672ed1132f8 100644 --- a/drivers/i3c/master/mipi-i3c-hci/dma.c +++ b/drivers/i3c/master/mipi-i3c-hci/dma.c @@ -9,6 +9,7 @@ */ #include <linux/bitfield.h> +#include <linux/delay.h> #include <linux/device.h> #include <linux/dma-mapping.h> #include <linux/errno.h> @@ -26,7 +27,7 @@ */ #define XFER_RINGS 1 /* max: 8 */ -#define XFER_RING_ENTRIES 16 /* max: 255 */ +#define XFER_RING_ENTRIES 255 /* max: 255 */ #define IBI_RINGS 1 /* max: 8 */ #define IBI_STATUS_RING_ENTRIES 32 /* max: 255 */ @@ -129,7 +130,7 @@ struct hci_rh_data { dma_addr_t xfer_dma, resp_dma, ibi_status_dma, ibi_data_dma; unsigned int xfer_entries, ibi_status_entries, ibi_chunks_total; unsigned int xfer_struct_sz, resp_struct_sz, ibi_status_sz, ibi_chunk_sz; - unsigned int done_ptr, ibi_chunk_ptr, xfer_space; + unsigned int xfer_alloc_sz, done_ptr, ibi_chunk_ptr, xfer_space; struct hci_xfer **src_xfers; struct completion op_done; }; @@ -186,13 +187,7 @@ static void hci_dma_free(void *data) rh = &rings->headers[i]; if (rh->xfer) - dma_free_coherent(rings->sysdev, - rh->xfer_struct_sz * rh->xfer_entries, - rh->xfer, rh->xfer_dma); - if (rh->resp) - dma_free_coherent(rings->sysdev, - rh->resp_struct_sz * rh->xfer_entries, - rh->resp, rh->resp_dma); + dma_free_coherent(rings->sysdev, rh->xfer_alloc_sz, rh->xfer, rh->xfer_dma); kfree(rh->src_xfers); if (rh->ibi_status) dma_free_coherent(rings->sysdev, @@ -258,6 +253,10 @@ ring_ready: rh_reg_write(RING_CONTROL, RING_CTRL_ENABLE); rh_reg_write(RING_CONTROL, RING_CTRL_ENABLE | RING_CTRL_RUN_STOP); + /* + * Do not clear the entries of rh->src_xfers because the recovery uses + * them. In other cases they should be NULL anyway. + */ rh->done_ptr = 0; rh->ibi_chunk_ptr = 0; rh->xfer_space = rh->xfer_entries; @@ -354,18 +353,19 @@ static int hci_dma_init(struct i3c_hci *hci) dev_dbg(&hci->master.dev, "xfer_struct_sz = %d, resp_struct_sz = %d", rh->xfer_struct_sz, rh->resp_struct_sz); - xfers_sz = rh->xfer_struct_sz * rh->xfer_entries; + xfers_sz = round_up(rh->xfer_struct_sz * rh->xfer_entries, 4); resps_sz = rh->resp_struct_sz * rh->xfer_entries; + rh->xfer_alloc_sz = xfers_sz + resps_sz; - rh->xfer = dma_alloc_coherent(rings->sysdev, xfers_sz, + rh->xfer = dma_alloc_coherent(rings->sysdev, rh->xfer_alloc_sz, &rh->xfer_dma, GFP_KERNEL); - rh->resp = dma_alloc_coherent(rings->sysdev, resps_sz, - &rh->resp_dma, GFP_KERNEL); rh->src_xfers = - kmalloc_objs(*rh->src_xfers, rh->xfer_entries); + kzalloc_objs(*rh->src_xfers, rh->xfer_entries); ret = -ENOMEM; - if (!rh->xfer || !rh->resp || !rh->src_xfers) + if (!rh->xfer || !rh->src_xfers) goto err_out; + rh->resp = rh->xfer + xfers_sz; + rh->resp_dma = rh->xfer_dma + xfers_sz; /* IBIs */ @@ -484,6 +484,12 @@ static int hci_dma_queue_xfer(struct i3c_hci *hci, spin_lock_irq(&hci->lock); + while (unlikely(hci->enqueue_blocked)) { + spin_unlock_irq(&hci->lock); + wait_event(hci->enqueue_wait_queue, !READ_ONCE(hci->enqueue_blocked)); + spin_lock_irq(&hci->lock); + } + if (n > rh->xfer_space) { spin_unlock_irq(&hci->lock); hci_dma_unmap_xfer(hci, xfer_list, n); @@ -496,6 +502,9 @@ static int hci_dma_queue_xfer(struct i3c_hci *hci, struct hci_xfer *xfer = xfer_list + i; u32 *ring_data = rh->xfer + rh->xfer_struct_sz * enqueue_ptr; + xfer->final_xfer = xfer_list + n - 1; + xfer->xfer_list_pos = i; + /* store cmd descriptor */ *ring_data++ = xfer->cmd_desc[0]; *ring_data++ = xfer->cmd_desc[1]; @@ -529,6 +538,9 @@ static int hci_dma_queue_xfer(struct i3c_hci *hci, enqueue_ptr = (enqueue_ptr + 1) % rh->xfer_entries; } + if (rh->xfer_space == rh->xfer_entries) + hci_start_xfer(xfer_list); + rh->xfer_space -= n; op1_val &= ~RING_OP1_CR_ENQ_PTR; @@ -539,35 +551,222 @@ static int hci_dma_queue_xfer(struct i3c_hci *hci, return 0; } +static void hci_dma_xfer_done(struct i3c_hci *hci, struct hci_rh_data *rh) +{ + u32 op1_val, op2_val, resp, *ring_resp; + unsigned int tid, done_ptr = rh->done_ptr; + unsigned int done_cnt = 0; + bool start_next = false; + struct hci_xfer *xfer; + + for (;;) { + op2_val = rh_reg_read(RING_OPERATION2); + if (done_ptr == FIELD_GET(RING_OP2_CR_DEQ_PTR, op2_val)) + break; + + ring_resp = rh->resp + rh->resp_struct_sz * done_ptr; + resp = *ring_resp; + tid = RESP_TID(resp); + dev_dbg(&hci->master.dev, "resp = 0x%08x", resp); + + xfer = rh->src_xfers[done_ptr]; + if (!xfer) { + dev_dbg(&hci->master.dev, "orphaned ring entry"); + } else { + hci_dma_unmap_xfer(hci, xfer, 1); + rh->src_xfers[done_ptr] = NULL; + xfer->ring_entry = -1; + if (tid != xfer->cmd_tid) { + dev_err(&hci->master.dev, + "response tid=%d when expecting %d\n", + tid, xfer->cmd_tid); + hci->recovery_needed = true; + if (!RESP_STATUS(resp)) + hci_cmd_set_resp_err(&resp, RESP_ERR_HC_TERMINATED); + } + xfer->response = resp; + if (xfer == xfer->final_xfer || RESP_STATUS(resp)) + complete(xfer->final_xfer->completion); + else + hci_start_xfer(xfer); + if (RESP_STATUS(resp)) { + hci->enqueue_blocked = true; + start_next = false; + } else { + start_next = true; + } + } + + done_ptr = (done_ptr + 1) % rh->xfer_entries; + rh->done_ptr = done_ptr; + done_cnt += 1; + } + + rh->xfer_space += done_cnt; + if (start_next && rh->xfer_space < rh->xfer_entries) { + xfer = rh->src_xfers[done_ptr]; + hci_start_xfer(xfer); + } + op1_val = rh_reg_read(RING_OPERATION1); + op1_val &= ~RING_OP1_CR_SW_DEQ_PTR; + op1_val |= FIELD_PREP(RING_OP1_CR_SW_DEQ_PTR, done_ptr); + rh_reg_write(RING_OPERATION1, op1_val); +} + +static void hci_dma_requires_hc_abort_quirk(struct i3c_hci *hci, struct hci_rh_data *rh) +{ + reinit_completion(&rh->op_done); + mipi_i3c_hci_abort(hci); + wait_for_completion_timeout(&rh->op_done, HZ); + rh_reg_write(RING_CONTROL, rh_reg_read(RING_CONTROL) | RING_CTRL_ABORT); +} + +static void hci_dma_abort(struct i3c_hci *hci, struct hci_rh_data *rh) +{ + if (hci->quirks & HCI_QUIRK_DMA_REQUIRES_HC_ABORT) { + hci_dma_requires_hc_abort_quirk(hci, rh); + return; + } + + reinit_completion(&rh->op_done); + rh_reg_write(RING_CONTROL, rh_reg_read(RING_CONTROL) | RING_CTRL_ABORT); + wait_for_completion_timeout(&rh->op_done, HZ); +} + +static void hci_dma_unblock_enqueue(struct i3c_hci *hci) +{ + if (hci->enqueue_blocked) { + hci->enqueue_blocked = false; + wake_up_all(&hci->enqueue_wait_queue); + } +} + +static void hci_dma_error_out_rh(struct i3c_hci *hci, struct hci_rh_data *rh) +{ + /* + * The entries of rh->src_xfers are not cleared by + * i3c_hci_reset_and_restore(), so can be used here. Do 2 passes so + * that the final_xfer of an xfer list is always processed last. + */ + for (int pass = 0; pass < 2; pass++) + for (int i = 0; i < rh->xfer_entries; i++) { + struct hci_xfer *xfer = rh->src_xfers[i]; + + if (!xfer || (!pass && xfer == xfer->final_xfer)) + continue; + hci_dma_unmap_xfer(hci, xfer, 1); + rh->src_xfers[i] = NULL; + xfer->ring_entry = -1; + hci_cmd_set_resp_err(&xfer->response, RESP_ERR_HC_TERMINATED); + if (xfer == xfer->final_xfer) + complete(xfer->final_xfer->completion); + } +} + +static void hci_dma_error_out_all(struct i3c_hci *hci) +{ + struct hci_rings_data *rings = hci->io_data; + + for (int i = 0; i < rings->total; i++) + hci_dma_error_out_rh(hci, &rings->headers[i]); +} + +static void hci_dma_recovery(struct i3c_hci *hci) +{ + int ret; + + dev_err(&hci->master.dev, "Attempting to recover from internal errors\n"); + + for (int i = 0; i < 3; i++) { + ret = i3c_hci_reset_and_restore(hci); + if (!ret) + break; + dev_err(&hci->master.dev, "Reset and restore failed, error %d\n", ret); + /* Just in case the controller is busy, give it some time */ + msleep(1000); + } + + spin_lock_irq(&hci->lock); + hci_dma_error_out_all(hci); + hci_dma_unblock_enqueue(hci); + hci->recovery_needed = false; + spin_unlock_irq(&hci->lock); + + dev_err(&hci->master.dev, "Recovery %s\n", ret ? "failed!" : "done"); +} + +static bool hci_dma_wait_for_noop(struct i3c_hci *hci, struct hci_xfer *xfer_list, int n, + int noop_pos) +{ + struct completion *done = xfer_list->final_xfer->completion; + bool timeout = !wait_for_completion_timeout(done, HZ); + u32 error = timeout; + + for (int i = noop_pos; i < n && !error; i++) + error = RESP_STATUS(xfer_list[i].response); + + if (!error) + return true; + + if (timeout) + dev_err(&hci->master.dev, "NoOp timeout error\n"); + else + dev_err(&hci->master.dev, "NoOp error %u\n", error); + + return false; +} + static bool hci_dma_dequeue_xfer(struct i3c_hci *hci, struct hci_xfer *xfer_list, int n) { struct hci_rings_data *rings = hci->io_data; struct hci_rh_data *rh = &rings->headers[xfer_list[0].ring_number]; + int noop_pos = -1; unsigned int i; bool did_unqueue = false; u32 ring_status; guard(mutex)(&hci->control_mutex); + spin_lock_irq(&hci->lock); +restart: ring_status = rh_reg_read(RING_STATUS); if (ring_status & RING_STATUS_RUNNING) { + /* + * The transfer may have already completed, especially + * if recovery has just run. Do nothing in that case. + */ + hci_dma_xfer_done(hci, rh); + if (xfer_list->final_xfer->ring_entry < 0 && + !hci->recovery_needed && !hci->enqueue_blocked && + ring_status == (RING_STATUS_ENABLED | RING_STATUS_RUNNING)) { + spin_unlock_irq(&hci->lock); + return false; + } + hci->enqueue_blocked = true; + spin_unlock_irq(&hci->lock); /* stop the ring */ - reinit_completion(&rh->op_done); - rh_reg_write(RING_CONTROL, RING_CTRL_ENABLE | RING_CTRL_ABORT); - wait_for_completion_timeout(&rh->op_done, HZ); + hci_dma_abort(hci, rh); + spin_lock_irq(&hci->lock); ring_status = rh_reg_read(RING_STATUS); if (ring_status & RING_STATUS_RUNNING) { - /* - * We're deep in it if ever this condition is ever met. - * Hardware might still be writing to memory, etc. - */ - dev_crit(&hci->master.dev, "unable to abort the ring\n"); - WARN_ON(1); + dev_err(&hci->master.dev, "Unable to abort the DMA ring\n"); + hci->recovery_needed = true; } } - spin_lock_irq(&hci->lock); + if ((hci->quirks & HCI_QUIRK_DMA_ABORT_REQUIRES_PIO_RESET) && + (rh_reg_read(RING_STATUS) & RING_STATUS_ABORTED)) + mipi_i3c_hci_pio_reset_all_queues(hci); + + hci_dma_xfer_done(hci, rh); + + if (hci->recovery_needed) { + hci->enqueue_blocked = true; + spin_unlock_irq(&hci->lock); + hci_dma_recovery(hci); + return true; + } for (i = 0; i < n; i++) { struct hci_xfer *xfer = xfer_list + i; @@ -589,23 +788,50 @@ static bool hci_dma_dequeue_xfer(struct i3c_hci *hci, *ring_data++ = 0; } - /* disassociate this xfer struct */ - rh->src_xfers[idx] = NULL; - - /* and unmap it */ - hci_dma_unmap_xfer(hci, xfer, 1); + if (noop_pos < 0) { + reinit_completion(xfer->final_xfer->completion); + noop_pos = i; + } did_unqueue = true; } } + /* + * A software ABORT may race with transfer completion and abort the next + * transfer list instead. Detect that case, and do not restart the ring. + * It will be handled by a subsequent dequeue. + */ + if (!did_unqueue) { + struct hci_xfer *xfer = rh->src_xfers[rh->done_ptr]; + + if (xfer && xfer->xfer_list_pos && xfer->final_xfer != xfer_list->final_xfer) { + spin_unlock_irq(&hci->lock); + return false; + } + } + /* restart the ring */ + reinit_completion(&rh->op_done); mipi_i3c_hci_resume(hci); rh_reg_write(RING_CONTROL, RING_CTRL_ENABLE); rh_reg_write(RING_CONTROL, RING_CTRL_ENABLE | RING_CTRL_RUN_STOP); + hci_dma_unblock_enqueue(hci); + + if (rh->xfer_space < rh->xfer_entries) + hci_start_xfer(rh->src_xfers[rh->done_ptr]); + spin_unlock_irq(&hci->lock); + wait_for_completion_timeout(&rh->op_done, HZ); + + if (did_unqueue && !hci_dma_wait_for_noop(hci, xfer_list, n, noop_pos)) { + spin_lock_irq(&hci->lock); + hci->recovery_needed = true; + goto restart; + } + return did_unqueue; } @@ -614,53 +840,6 @@ static int hci_dma_handle_error(struct i3c_hci *hci, struct hci_xfer *xfer_list, return hci_dma_dequeue_xfer(hci, xfer_list, n) ? -EIO : 0; } -static void hci_dma_xfer_done(struct i3c_hci *hci, struct hci_rh_data *rh) -{ - u32 op1_val, op2_val, resp, *ring_resp; - unsigned int tid, done_ptr = rh->done_ptr; - unsigned int done_cnt = 0; - struct hci_xfer *xfer; - - for (;;) { - op2_val = rh_reg_read(RING_OPERATION2); - if (done_ptr == FIELD_GET(RING_OP2_CR_DEQ_PTR, op2_val)) - break; - - ring_resp = rh->resp + rh->resp_struct_sz * done_ptr; - resp = *ring_resp; - tid = RESP_TID(resp); - dev_dbg(&hci->master.dev, "resp = 0x%08x", resp); - - xfer = rh->src_xfers[done_ptr]; - if (!xfer) { - dev_dbg(&hci->master.dev, "orphaned ring entry"); - } else { - hci_dma_unmap_xfer(hci, xfer, 1); - rh->src_xfers[done_ptr] = NULL; - xfer->ring_entry = -1; - xfer->response = resp; - if (tid != xfer->cmd_tid) { - dev_err(&hci->master.dev, - "response tid=%d when expecting %d\n", - tid, xfer->cmd_tid); - /* TODO: do something about it? */ - } - if (xfer->completion) - complete(xfer->completion); - } - - done_ptr = (done_ptr + 1) % rh->xfer_entries; - rh->done_ptr = done_ptr; - done_cnt += 1; - } - - rh->xfer_space += done_cnt; - op1_val = rh_reg_read(RING_OPERATION1); - op1_val &= ~RING_OP1_CR_SW_DEQ_PTR; - op1_val |= FIELD_PREP(RING_OP1_CR_SW_DEQ_PTR, done_ptr); - rh_reg_write(RING_OPERATION1, op1_val); -} - static int hci_dma_request_ibi(struct i3c_hci *hci, struct i3c_dev_desc *dev, const struct i3c_ibi_setup *req) { @@ -781,10 +960,18 @@ static void hci_dma_process_ibi(struct i3c_hci *hci, struct hci_rh_data *rh) } /* determine who this is for */ + if (ibi_addr == I3C_HOT_JOIN_ADDR) { + i3c_master_queue_hotjoin(&hci->master); + goto done; + } + dev = i3c_hci_addr_to_dev(hci, ibi_addr); if (!dev) { - dev_err(&hci->master.dev, - "IBI for unknown device %#x\n", ibi_addr); + /* + * Either an IBI received just before IBI's were disabled, or + * the controller is broken. Assume the former. + */ + dev_dbg(&hci->master.dev, "IBI when not enabled at address %#x\n", ibi_addr); goto done; } diff --git a/drivers/i3c/master/mipi-i3c-hci/hci.h b/drivers/i3c/master/mipi-i3c-hci/hci.h index f17f43494c1b..b3d9803b1968 100644 --- a/drivers/i3c/master/mipi-i3c-hci/hci.h +++ b/drivers/i3c/master/mipi-i3c-hci/hci.h @@ -11,6 +11,7 @@ #define HCI_H #include <linux/io.h> +#include <linux/jiffies.h> /* 32-bit word aware bit and mask macros */ #define W0_MASK(h, l) GENMASK((h) - 0, (l) - 0) @@ -54,12 +55,17 @@ struct i3c_hci { struct mutex control_mutex; atomic_t next_cmd_tid; bool irq_inactive; + bool enqueue_blocked; + bool recovery_needed; + bool hj_init_done; + wait_queue_head_t enqueue_wait_queue; u32 caps; unsigned int quirks; unsigned int DAT_entries; unsigned int DAT_entry_size; void *DAT_data; struct dat_words *DAT; + struct i3c_dev_desc **ibi_devs; unsigned int DCT_entries; unsigned int DCT_entry_size; u8 version_major; @@ -85,11 +91,13 @@ struct hci_xfer { u32 cmd_desc[4]; u32 response; bool rnw; + bool started; void *data; unsigned int data_len; unsigned int cmd_tid; struct completion *completion; unsigned long timeout; + unsigned long start_jiffies; union { struct { /* PIO specific */ @@ -102,8 +110,10 @@ struct hci_xfer { struct { /* DMA specific */ struct i3c_dma *dma; + struct hci_xfer *final_xfer; int ring_number; int ring_entry; + int xfer_list_pos; }; }; }; @@ -118,6 +128,14 @@ static inline void hci_free_xfer(struct hci_xfer *xfer, unsigned int n) kfree(xfer); } +static inline void hci_start_xfer(struct hci_xfer *xfer) +{ + if (!xfer->started) { + xfer->started = true; + xfer->start_jiffies = jiffies; + } +} + /* This abstracts PIO vs DMA operations */ struct hci_io_ops { bool (*irq_handler)(struct i3c_hci *hci); @@ -152,10 +170,14 @@ struct i3c_hci_dev_data { #define HCI_QUIRK_RPM_ALLOWED BIT(5) /* Runtime PM allowed */ #define HCI_QUIRK_RPM_IBI_ALLOWED BIT(6) /* IBI and Hot-Join allowed while runtime suspended */ #define HCI_QUIRK_RPM_PARENT_MANAGED BIT(7) /* Runtime PM managed by parent device */ +#define HCI_QUIRK_DMA_ABORT_REQUIRES_PIO_RESET BIT(8) /* Do PIO queue SW resets after DMA abort */ +#define HCI_QUIRK_DMA_REQUIRES_HC_ABORT BIT(9) /* Use HC_CONTROL ABORT to abort DMA */ /* global functions */ void mipi_i3c_hci_resume(struct i3c_hci *hci); +void mipi_i3c_hci_abort(struct i3c_hci *hci); void mipi_i3c_hci_pio_reset(struct i3c_hci *hci); +void mipi_i3c_hci_pio_reset_all_queues(struct i3c_hci *hci); void mipi_i3c_hci_dct_index_reset(struct i3c_hci *hci); void amd_set_od_pp_timing(struct i3c_hci *hci); void amd_set_resp_buf_thld(struct i3c_hci *hci); @@ -167,4 +189,6 @@ int i3c_hci_process_xfer(struct i3c_hci *hci, struct hci_xfer *xfer, int n); int i3c_hci_rpm_suspend(struct device *dev); int i3c_hci_rpm_resume(struct device *dev); +int i3c_hci_reset_and_restore(struct i3c_hci *hci); + #endif diff --git a/drivers/i3c/master/mipi-i3c-hci/ibi.h b/drivers/i3c/master/mipi-i3c-hci/ibi.h index e1f98e264da0..073ca67b7d04 100644 --- a/drivers/i3c/master/mipi-i3c-hci/ibi.h +++ b/drivers/i3c/master/mipi-i3c-hci/ibi.h @@ -26,17 +26,6 @@ #define IBI_DATA_LENGTH GENMASK(7, 0) /* handy helpers */ -static inline struct i3c_dev_desc * -i3c_hci_addr_to_dev(struct i3c_hci *hci, unsigned int addr) -{ - struct i3c_bus *bus = i3c_master_get_bus(&hci->master); - struct i3c_dev_desc *dev; - - i3c_bus_for_each_i3cdev(bus, dev) { - if (dev->info.dyn_addr == addr) - return dev; - } - return NULL; -} +struct i3c_dev_desc *i3c_hci_addr_to_dev(struct i3c_hci *hci, unsigned int addr); #endif diff --git a/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c b/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c index 9468786fb853..5a9e2a43eff8 100644 --- a/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c +++ b/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c @@ -461,21 +461,21 @@ static const struct dev_pm_ops mipi_i3c_hci_pci_pm_ops = { static const struct pci_device_id mipi_i3c_hci_pci_devices[] = { /* Wildcat Lake-U */ - { PCI_VDEVICE(INTEL, 0x4d7c), (kernel_ulong_t)&intel_mi_1_info}, - { PCI_VDEVICE(INTEL, 0x4d6f), (kernel_ulong_t)&intel_si_2_info}, + { PCI_VDEVICE(INTEL, 0x4d7c), .driver_data = (kernel_ulong_t)&intel_mi_1_info }, + { PCI_VDEVICE(INTEL, 0x4d6f), .driver_data = (kernel_ulong_t)&intel_si_2_info }, /* Panther Lake-H */ - { PCI_VDEVICE(INTEL, 0xe37c), (kernel_ulong_t)&intel_mi_1_info}, - { PCI_VDEVICE(INTEL, 0xe36f), (kernel_ulong_t)&intel_si_2_info}, + { PCI_VDEVICE(INTEL, 0xe37c), .driver_data = (kernel_ulong_t)&intel_mi_1_info }, + { PCI_VDEVICE(INTEL, 0xe36f), .driver_data = (kernel_ulong_t)&intel_si_2_info }, /* Panther Lake-P */ - { PCI_VDEVICE(INTEL, 0xe47c), (kernel_ulong_t)&intel_mi_1_info}, - { PCI_VDEVICE(INTEL, 0xe46f), (kernel_ulong_t)&intel_si_2_info}, + { PCI_VDEVICE(INTEL, 0xe47c), .driver_data = (kernel_ulong_t)&intel_mi_1_info }, + { PCI_VDEVICE(INTEL, 0xe46f), .driver_data = (kernel_ulong_t)&intel_si_2_info }, /* Nova Lake-S */ - { PCI_VDEVICE(INTEL, 0x6e2c), (kernel_ulong_t)&intel_mi_1_info}, - { PCI_VDEVICE(INTEL, 0x6e2d), (kernel_ulong_t)&intel_mi_2_info}, + { PCI_VDEVICE(INTEL, 0x6e2c), .driver_data = (kernel_ulong_t)&intel_mi_1_info }, + { PCI_VDEVICE(INTEL, 0x6e2d), .driver_data = (kernel_ulong_t)&intel_mi_2_info }, /* Nova Lake-H */ - { PCI_VDEVICE(INTEL, 0xd37c), (kernel_ulong_t)&intel_mi_1_info}, - { PCI_VDEVICE(INTEL, 0xd36f), (kernel_ulong_t)&intel_mi_2_info}, - { }, + { PCI_VDEVICE(INTEL, 0xd37c), .driver_data = (kernel_ulong_t)&intel_mi_1_info }, + { PCI_VDEVICE(INTEL, 0xd36f), .driver_data = (kernel_ulong_t)&intel_mi_2_info }, + { } }; MODULE_DEVICE_TABLE(pci, mipi_i3c_hci_pci_devices); diff --git a/drivers/i3c/master/mipi-i3c-hci/pio.c b/drivers/i3c/master/mipi-i3c-hci/pio.c index 8f48a81e65ab..ff2657ee220b 100644 --- a/drivers/i3c/master/mipi-i3c-hci/pio.c +++ b/drivers/i3c/master/mipi-i3c-hci/pio.c @@ -605,6 +605,7 @@ static bool hci_pio_process_cmd(struct i3c_hci *hci, struct hci_pio_data *pio) * Finally send the command. */ hci_pio_write_cmd(hci, pio->curr_xfer); + hci_start_xfer(pio->curr_xfer); /* * And move on. */ @@ -861,10 +862,18 @@ static bool hci_pio_prep_new_ibi(struct i3c_hci *hci, struct hci_pio_data *pio) ibi->seg_len = FIELD_GET(IBI_DATA_LENGTH, ibi_status); ibi->seg_cnt = ibi->seg_len; + if (ibi->addr == I3C_HOT_JOIN_ADDR) { + i3c_master_queue_hotjoin(&hci->master); + return true; + } + dev = i3c_hci_addr_to_dev(hci, ibi->addr); if (!dev) { - dev_err(&hci->master.dev, - "IBI for unknown device %#x\n", ibi->addr); + /* + * Either an IBI received just before IBI's were disabled, or + * the controller is broken. Assume the former. + */ + dev_dbg(&hci->master.dev, "IBI when not enabled at address %#x\n", ibi->addr); return true; } diff --git a/drivers/i3c/master/svc-i3c-master.c b/drivers/i3c/master/svc-i3c-master.c index e2d99a3ac07d..93805df8a940 100644 --- a/drivers/i3c/master/svc-i3c-master.c +++ b/drivers/i3c/master/svc-i3c-master.c @@ -208,7 +208,6 @@ struct svc_i3c_drvdata { * @free_slots: Bit array of available slots * @addrs: Array containing the dynamic addresses of each attached device * @descs: Array of descriptors, one per attached device - * @hj_work: Hot-join work * @irq: Main interrupt * @num_clks: I3C clock number * @fclk: Fast clock (bus) @@ -235,7 +234,6 @@ struct svc_i3c_master { u32 free_slots; u8 addrs[SVC_I3C_MAX_DEVS]; struct i3c_dev_desc *descs[SVC_I3C_MAX_DEVS]; - struct work_struct hj_work; int irq; int num_clks; struct clk *fclk; @@ -366,14 +364,6 @@ to_svc_i3c_master(struct i3c_master_controller *master) return container_of(master, struct svc_i3c_master, base); } -static void svc_i3c_master_hj_work(struct work_struct *work) -{ - struct svc_i3c_master *master; - - master = container_of(work, struct svc_i3c_master, hj_work); - i3c_master_do_daa(&master->base); -} - static struct i3c_dev_desc * svc_i3c_master_dev_from_addr(struct svc_i3c_master *master, unsigned int ibiaddr) @@ -651,10 +641,19 @@ static void svc_i3c_master_ibi_isr(struct svc_i3c_master *master) case SVC_I3C_MSTATUS_IBITYPE_HOT_JOIN: svc_i3c_master_emit_stop(master); if (is_events_enabled(master, SVC_I3C_EVENT_HOTJOIN)) - queue_work(master->base.wq, &master->hj_work); + i3c_master_queue_hotjoin(&master->base); break; case SVC_I3C_MSTATUS_IBITYPE_MASTER_REQUEST: svc_i3c_master_emit_stop(master); + + /* + * If a target gets stuck holding SDA low, the controller reports a MR. + * On NPCM845, emitting STOP may spuriously set SLVSTART, retriggering + * the interrupt and re-entering MR handling, leading to an IRQ storm. + * Clear SLVSTART after STOP to break the loop. + */ + if (svc_has_quirk(master, SVC_I3C_QUIRK_FALSE_SLVSTART)) + writel(SVC_I3C_MINT_SLVSTART, master->regs + SVC_I3C_MSTATUS); break; default: break; @@ -672,10 +671,18 @@ static irqreturn_t svc_i3c_master_irq_handler(int irq, void *dev_id) /* Clear the interrupt status */ writel(SVC_I3C_MINT_SLVSTART, master->regs + SVC_I3C_MSTATUS); - /* Ignore the false event */ - if (svc_has_quirk(master, SVC_I3C_QUIRK_FALSE_SLVSTART) && - !SVC_I3C_MSTATUS_STATE_SLVREQ(active)) - return IRQ_HANDLED; + if (svc_has_quirk(master, SVC_I3C_QUIRK_FALSE_SLVSTART)) { + /* + * Re-read MSTATUS to obtain the latest state and avoid + * missing an IBI that arrives after MSTATUS is latched + * but before SLVSTART is cleared. + */ + active = readl(master->regs + SVC_I3C_MSTATUS); + + /* Ignore the false event */ + if (!SVC_I3C_MSTATUS_STATE_SLVREQ(active)) + return IRQ_HANDLED; + } /* * The SDA line remains low until the request is processed. @@ -2022,7 +2029,6 @@ static int svc_i3c_master_probe(struct platform_device *pdev) if (ret) return dev_err_probe(dev, ret, "can't enable I3C clocks\n"); - INIT_WORK(&master->hj_work, svc_i3c_master_hj_work); mutex_init(&master->lock); ret = devm_request_irq(dev, master->irq, svc_i3c_master_irq_handler, @@ -2081,7 +2087,6 @@ static void svc_i3c_master_remove(struct platform_device *pdev) { struct svc_i3c_master *master = platform_get_drvdata(pdev); - cancel_work_sync(&master->hj_work); i3c_master_unregister(&master->base); pm_runtime_dont_use_autosuspend(&pdev->dev); |
