summaryrefslogtreecommitdiff
path: root/drivers
diff options
context:
space:
mode:
authorSuraj Kandpal <suraj.kandpal@intel.com>2025-06-19 17:03:40 +0530
committerSuraj Kandpal <suraj.kandpal@intel.com>2025-06-24 10:23:30 +0530
commitc4c1a9153079242465ce9a3d9753db8324c4b2bb (patch)
tree3197ab68540092f3c08833b8750874805f107d05 /drivers
parentb8c01389b80fafd8ef50287e0820f4c761ffdeb8 (diff)
drm/i915/hdcp: Use HDCP2_STREAM_STATUS instead of HDCP2_AUTH_STREAM
From PTL we need to move to using HDCP2_STREAM_STATUS as a WARN_ON to see if written content type info is not the same since HDCP2_AUTH_STREAM is inaccessible to us now. --v2 -Fix commit message [Jani] Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Link: https://lore.kernel.org/r/20250619113340.3379200-3-suraj.kandpal@intel.com
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/i915/display/intel_dp_hdcp.c19
-rw-r--r--drivers/gpu/drm/i915/display/intel_hdcp_regs.h2
2 files changed, 16 insertions, 5 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
index 70dafaa2afad..bd757db85927 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
@@ -808,10 +808,13 @@ intel_dp_mst_hdcp2_stream_encryption(struct intel_connector *connector,
u32 val;
u8 stream_type;
- val = intel_de_read(display, HDCP2_AUTH_STREAM(display, cpu_transcoder, port));
- stream_type = REG_FIELD_GET(AUTH_STREAM_TYPE_MASK, val);
- drm_WARN_ON(display->drm, enable &&
- stream_type != data->streams[0].stream_type);
+ if (DISPLAY_VER(display) < 30) {
+ val = intel_de_read(display,
+ HDCP2_AUTH_STREAM(display, cpu_transcoder, port));
+ stream_type = REG_FIELD_GET(AUTH_STREAM_TYPE_MASK, val);
+ drm_WARN_ON(display->drm, enable &&
+ stream_type != data->streams[0].stream_type);
+ }
ret = intel_dp_mst_toggle_hdcp_stream_select(connector, enable);
if (ret)
@@ -827,6 +830,14 @@ intel_dp_mst_hdcp2_stream_encryption(struct intel_connector *connector,
return -ETIMEDOUT;
}
+ if (DISPLAY_VER(display) >= 30) {
+ val = intel_de_read(display,
+ HDCP2_STREAM_STATUS(display, cpu_transcoder, port));
+ stream_type = REG_FIELD_GET(STREAM_TYPE_STATUS_MASK, val);
+ drm_WARN_ON(display->drm, enable &&
+ stream_type != data->streams[0].stream_type);
+ }
+
return 0;
}
diff --git a/drivers/gpu/drm/i915/display/intel_hdcp_regs.h b/drivers/gpu/drm/i915/display/intel_hdcp_regs.h
index 8b9b87910a9e..112ce8c896d6 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_hdcp_regs.h
@@ -247,7 +247,7 @@
_TRANSA_HDCP2_STREAM_STATUS, \
_TRANSB_HDCP2_STREAM_STATUS)
#define STREAM_ENCRYPTION_STATUS REG_BIT(31)
-#define STREAM_TYPE_STATUS REG_BIT(30)
+#define STREAM_TYPE_STATUS_MASK REG_GENMASK(30, 30)
#define HDCP2_STREAM_STATUS(dev_priv, trans, port) \
(TRANS_HDCP(dev_priv) ? \
TRANS_HDCP2_STREAM_STATUS(trans) : \