drm/amdgpu: Add smuio v15_0_3 support

Add initial implementation for the new generation of smuio

v2: squash in clock counter changes

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Frank Min <Frank.Min@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

4 files changed, 119 insertions, 0 deletions

diff --git a/drivers/gpu/drm/amd/amdgpu/Makefile b/drivers/gpu/drm/amd/amdgpu/Makefile
index 27ab027271fa..a8a1f65b4615 100644
--- a/drivers/gpu/drm/amd/amdgpu/Makefile
+++ b/drivers/gpu/drm/amd/amdgpu/Makefile
@@ -264,6 +264,7 @@ amdgpu-y += \
 	smuio_v13_0_6.o \
 	smuio_v14_0_2.o \
 	smuio_v15_0_0.o \
+	smuio_v15_0_3.o \
 	smuio_v15_0_8.o
 
 # add reset block
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
index d2bbc9529d90..9a2064d5fe75 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
@@ -115,6 +115,7 @@
 #include "smuio_v13_0_6.h"
 #include "smuio_v14_0_2.h"
 #include "smuio_v15_0_0.h"
+#include "smuio_v15_0_3.h"
 #include "smuio_v15_0_8.h"
 #include "vcn_v5_0_0.h"
 #include "vcn_v5_0_1.h"
@@ -3950,6 +3951,9 @@ int amdgpu_discovery_set_ip_blocks(struct amdgpu_device *adev)
 	case IP_VERSION(15, 0, 5):
 		adev->smuio.funcs = &smuio_v15_0_0_funcs;
 		break;
+	case IP_VERSION(15, 0, 3):
+		adev->smuio.funcs = &smuio_v15_0_3_funcs;
+		break;
 	case IP_VERSION(15, 0, 8):
 		adev->smuio.funcs = &smuio_v15_0_8_funcs;
 		break;
diff --git a/drivers/gpu/drm/amd/amdgpu/smuio_v15_0_3.c b/drivers/gpu/drm/amd/amdgpu/smuio_v15_0_3.c
new file mode 100644
index 000000000000..7bc41526128c
--- /dev/null
+++ b/drivers/gpu/drm/amd/amdgpu/smuio_v15_0_3.c
@@ -0,0 +1,84 @@
+/*
+ * Copyright 2025 Advanced Micro Devices, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+#include "amdgpu.h"
+#include "smuio_v15_0_3.h"
+#include "soc15_common.h"
+#include "smuio/smuio_15_0_3_offset.h"
+#include "smuio/smuio_15_0_3_sh_mask.h"
+#include <linux/preempt.h>
+
+static u64 smuio_v15_0_3_get_gpu_clock_counter(struct amdgpu_device *adev)
+{
+	u32 clock_counter_lo, clock_counter_hi, clock_counter_hi_check;
+
+	preempt_disable();
+	do {
+		clock_counter_hi = RREG32_SOC15(SMUIO, 0, regCCD_GOLDEN_TSC_COUNT_UPPER);
+		clock_counter_lo = RREG32_SOC15(SMUIO, 0, regCCD_GOLDEN_TSC_COUNT_LOWER);
+		/* Retry if the counter rolled over while polling the registers. */
+		clock_counter_hi_check = RREG32_SOC15(SMUIO, 0, regCCD_GOLDEN_TSC_COUNT_UPPER);
+	} while (clock_counter_hi != clock_counter_hi_check);
+	preempt_enable();
+
+	return clock_counter_lo | ((u64)clock_counter_hi << 32ULL);
+}
+
+/**
+ * smuio_v15_0_3_get_die_id - query die id from FCH.
+ *
+ * @adev: amdgpu device pointer
+ *
+ * Returns die id
+ */
+static u32 smuio_v15_0_3_get_die_id(struct amdgpu_device *adev)
+{
+	u32 data, die_id;
+
+	data = RREG32_SOC15(SMUIO, 0, regSMUIO_MCM_CONFIG);
+	die_id = REG_GET_FIELD(data, SMUIO_MCM_CONFIG, DIE_ID);
+
+	return die_id;
+}
+
+/**
+ * smuio_v15_0_3_get_socket_id - query socket id from FCH
+ *
+ * @adev: amdgpu device pointer
+ *
+ * Returns socket id
+ */
+static u32 smuio_v15_0_3_get_socket_id(struct amdgpu_device *adev)
+{
+	u32 data, socket_id;
+
+	data = RREG32_SOC15(SMUIO, 0, regSMUIO_MCM_CONFIG);
+	socket_id = REG_GET_FIELD(data, SMUIO_MCM_CONFIG, SOCKET_ID);
+
+	return socket_id;
+}
+
+const struct amdgpu_smuio_funcs smuio_v15_0_3_funcs = {
+	.get_gpu_clock_counter = smuio_v15_0_3_get_gpu_clock_counter,
+	.get_die_id = smuio_v15_0_3_get_die_id,
+	.get_socket_id = smuio_v15_0_3_get_socket_id,
+};
diff --git a/drivers/gpu/drm/amd/amdgpu/smuio_v15_0_3.h b/drivers/gpu/drm/amd/amdgpu/smuio_v15_0_3.h
new file mode 100644
index 000000000000..dfbcd9d7f927
--- /dev/null
+++ b/drivers/gpu/drm/amd/amdgpu/smuio_v15_0_3.h
@@ -0,0 +1,30 @@
+/*
+ * Copyright 2025 Advanced Micro Devices, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+#ifndef __SMUIO_V15_0_3_H__
+#define __SMUIO_V15_0_3_H__
+
+#include "soc15_common.h"
+
+extern const struct amdgpu_smuio_funcs smuio_v15_0_3_funcs;
+
+#endif /* __SMUIO_V15_0_3_H__ */